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Patent # Description
US-9,997,662 Light-emitting metal-oxide-semiconductor devices and associated systems, devices, and methods
Various embodiments of solid state transducer ("SST") devices are disclosed. In several embodiments, a light emitter device includes a metal-oxide-semiconductor...
US-9,997,592 Capacitor, array of capacitors, and device comprising an electrode
A capacitor includes an elevationally inner capacitor electrode, an elevationally outer capacitor electrode, and capacitor insulator between the elevationally...
US-9,997,461 Electrically conductive laminate structures
Some embodiments include electrical interconnects. The interconnects may contain laminate structures having a graphene region sandwiched between non-graphene...
US-9,997,452 Forming conductive plugs for memory device
Apparatuses and methods with conductive plugs for a memory device are described. An example method includes: forming a plurality of shallow trench isolations...
US-9,997,398 Methods of forming one or more covered voids in a semiconductor substrate
Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for...
US-9,997,247 Memory devices having source lines directly coupled to body regions and methods
Memory devices, memory cell strings and methods of operating memory devices are shown. Configurations described include directly coupling an elongated body...
US-9,997,246 Memory devices and their operation having trim registers associated with access operation commands
Methods including performing an access operation on a memory device using trims corresponding to trim settings, receiving a command to suspend the access...
US-9,997,232 Processing in memory (PIM) capable memory device having sensing circuitry performing logic operations
Apparatuses and methods are provided for logic/memory devices. An example apparatus comprises a plurality of memory components adjacent to and coupled to one...
US-9,997,220 Apparatuses and methods for adjusting delay of command signal path
Apparatuses and methods related to adjusting a delay of a command signal path are disclosed. An example apparatus includes: a timing circuit that includes a...
US-9,997,212 Accessing data in memory
The present disclosure includes apparatuses and methods related to accessing data in memory. One example method comprises storing data associated with a first...
US-9,996,496 Devices, systems, and methods of reducing chip select
Several systems and methods of chip select are described. In one such method, a device maintains two identifiers, (ID_a and ID_m). When the device receives a...
US-9,996,479 Encryption of executables in computational memory
The present disclosure is related to encryption of executables in computational memory. Computational memory can traverse an operating system page table in the...
US-9,991,331 Apparatuses and methods for semiconductor circuit layout
Apparatuses including compensation capacitors are described. An example apparatus includes: first, second and third capacitors arranged such that the second...
US-9,991,273 Floating gate memory cells in vertical memory
Floating gate memory cells in vertical memory. A control gate is formed between a first tier of dielectric material and a second tier of dielectric material. A...
US-9,991,210 Electromagnetic shield and associated methods
Semiconductor devices are described, along with methods and systems that include them. One such device includes a diffusion region in a semiconductor material,...
US-9,991,122 Methods of forming semiconductor device structures including two-dimensional material structures
A method of forming a semiconductor device structure comprises forming at least one 2D material over a substrate. The at least one 2D material is treated with...
US-9,990,995 Systems having a resistive memory device
Systems having a resistive memory device having control circuitry configured to build a data word from remapped data bits from a received data word such that...
US-9,990,994 Methods of programming memories having a shared resistance variable material
Methods for programming data to an array of memory cells having a first memory cell, a second memory cell that is adjacent to the first memory cell in a first...
US-9,990,990 Apparatuses and methods for accessing variable resistance memory device
The disclosed technology generally relates to memory apparatuses and methods of operating the same, and more particularly to a memory device having a controller...
US-9,990,989 Enhancing nucleation in phase-change memory cells
Various embodiments disclosed herein comprise methods and apparatuses for placing phase-change memory (PCM) cells of a memory array into a temperature regime...
US-9,990,988 Determining whether a memory cell state is in a valley between adjacent data states
A determination can be made as to whether a state of a memory cell is in a valley between adjacent distributions of states associated with respective data...
US-9,990,977 Power reduction for a sensing operation of a memory cell
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A memory device may leverage non-volatile memory properties of a...
US-9,990,971 Devices, methods, and systems supporting on unit termination
The present disclosure includes devices, methods, and systems supporting on unit termination. A number of embodiments include a number of memory units, wherein...
US-9,990,967 Apparatuses and methods for performing corner turn operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing corner turn operations using sensing circuitry. An example apparatus comprises a...
US-9,990,144 Stacked memory devices, systems, and methods
Memory requests for information from a processor are received in an interface device, and the interface device is coupled to a stack including two or more...
US-9,989,616 Memory arrays
Some embodiments include memory arrays. The memory arrays can have global bitlines extending along a first horizontal direction, vertical local bitlines...
US-9,985,651 Read threshold calibration for LDPC
Apparatuses and methods for soft read threshold location calibration are provided. One example method can include selecting read threshold sets (RTSs), and...
US-9,985,183 Solid state lighting devices with accessible electrodes and methods of manufacturing
Various embodiments of light emitting dies and solid state lighting ("SSL") devices with light emitting dies, assemblies, and methods of manufacturing are...
US-9,985,181 Epitaxial formation support structures and associated methods
Epitaxial formation support structures and associated methods of manufacturing epitaxial formation support structures and solid state lighting devices are...
US-9,985,076 Diode/superionic conductor/polymer memory structure
A conjugated polymer layer with a built-in diode is formed by providing a first metal-chalcogenide layer over a bottom electrode. Subsequently, a second...
US-9,985,049 Arrays of elevationally-extending strings of memory cells and methods of forming memory arrays
An array of elevationally-extending strings of memory cells comprises a vertical stack of alternating insulative levels and wordline levels. The wordline levels...
US-9,985,040 Integrated circuitry and 3D memory
Integrated circuitry has an array circuitry region having a repeating array of electronic components. An adjacent circuitry region is immediately laterally...
US-9,985,000 Stacked semiconductor die assemblies with die support members and associated systems and methods
Stacked semiconductor die assemblies with die support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die...
US-9,984,977 Semiconductor constructions
Some embodiments include a construction having conductive structures spaced from one another by intervening regions. Insulative structures are within the...
US-9,984,756 Fast programming memory device
In an embodiment of a memory device including a matrix of memory cells wherein the memory cells are arranged in a plurality of memory cells strings each one...
US-9,979,915 Pixel array with shared pixels in a single column and associated devices, systems, and methods
Pixel array with shared pixels in a single column and associated devices, systems, and methods are disclosed herein. In one embodiment, a pixel array includes a...
US-9,977,902 Enabling a secure boot from non-volatile memory
A system may include a host that may include a processor coupled to a non-volatile memory over a secure communication protocol. As a result, prior to release...
US-9,977,603 Memory devices for detecting known initial states and related methods and electronic systems
A memory device includes a memory array having non-volatile memory cells, and a memory controller configured to detect a known state to enter based, at least in...
US-9,975,206 Composition of solid-containing paste
Solder paste compositions and methods for applying solder paste. The solder paste includes lubricating additives to the flux to decrease friction and the...
US-9,974,965 Relay module for implant
An implementation provides a system that includes: a control module including a first antenna, the control module configured to generate a first radio frequency...
US-9,973,719 Antiblooming imaging apparatus, systems, and methods
Apparatus, systems, and methods are described to assist in reducing dark current in an active pixel sensor. In various embodiments, a potential barrier...
US-9,973,181 Synchronized semiconductor device with phase adjustment circuit
According to one embodiment, a synchronous semiconductor device is disclosed According to this embodiment, the synchronous semiconductor device includes a pulse...
US-9,972,862 Secondary battery
Provided is a secondary battery in which a single-layer secondary cell has an all-solid-state secondary cell structure with a storage layer sandwiched between a...
US-9,972,770 Methods of forming memory cells, arrays of magnetic memory cells, and semiconductor devices
Magnetic memory cells, methods of fabrication, semiconductor device structures, and memory systems are disclosed. A magnetic cell core includes at least one...
US-9,972,628 Conductive structures, wordlines and transistors
Some embodiments include a conductive structure which has a first conductive material having a work function of at least 4.5 eV, and a second conductive...
US-9,972,532 Interconnect structures for integrated circuits and their formation
An embodiment of an interconnect structure for an integrated circuit may include a first conductor coupled to circuitry, a second conductor, a dielectric...
US-9,972,391 Apparatus, systems, and methods to operate a memory
Various embodiments, disclosed herein, include apparatus and methods to read a logic level in a selected memory cell in a selected string of a memory by sensing...
US-9,972,367 Shifting data in sensing circuitry
The present disclosure includes apparatuses and methods related to shifting data. An example apparatus comprises sensing circuitry including a sense amplifier...
US-9,972,363 Apparatus for impedance adjustment and methods of their operation
Apparatus include a data bus and a signal driver circuit having pluralities of first and second termination devices connected in parallel between a voltage node...
US-9,971,541 Apparatuses and methods for data movement
The present disclosure includes apparatuses and methods for data movement. An example apparatus includes a memory device that includes a plurality of subarrays...
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