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Pre-compensation of memory threshold voltage
Methods of operating a memory include storing a first target data state of multiple possible data states of a first memory cell to be programmed in a target...
Reducing programming disturbance in memory devices
Apparatus and methods are disclosed, such as a method that includes precharging channel material of a string of memory cells in an unselected sub-block of a...
Unidirectional spin torque transfer magnetic memory cell structure
Spin torque transfer magnetic random access memory devices configured to be programmed unidirectionally and methods of programming such devices. The devices...
Apparatuses and methods for performing logical operations using sensing
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an...
Comparison operations in memory
The present disclosure includes apparatuses and methods related to performing comparison operations in memory. An example apparatus can include a first group of...
The present disclosure includes methods, devices, and systems for controlling a memory device. One method for controlling a memory device embodiment includes...
Multi-junction solid state transducer devices for direct AC power and
associated systems and methods
Multi-junction solid-state transducer (SST) devices and associated systems and methods are disclosed herein. In several embodiments, for example, an SST system...
Apparatuses, methods, and circuits including a delay circuit
Apparatuses, methods, and delay circuits for delaying signals are described. An example apparatus includes a fine delay circuit configured to provide an output...
Electrical contactor and electrical connecting apparatus
An object of the present invention is to provide an electrical contactor highly resistant to deformation capable of achieving satisfactory performance of...
Microelectronic device packages, stacked microelectronic device packages,
and methods for manufacturing...
A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second ...
Semiconductor constructions having through-substrate interconnects
Some embodiments include methods of forming interconnects through semiconductor substrates. An opening may be formed to extend partway through a semiconductor...
Methods for forming semiconductor devices and semiconductor device
Methods of forming semiconductor devices and features in semiconductor device structures include conducting an anti-spacer process to remove portions of a first...
Gallium lanthanide oxide films
Electronic apparatus and methods of forming the electronic apparatus include a gallium lanthanide oxide film for use in a variety of electronic systems. The...
Systems, methods and devices for a memory having a buried select line
Memory cells and methods for programming and erasing a memory cell by utilizing a buried select line are described. A voltage potential may be generated between...
Loop structure for operations in memory
Examples of the present disclosure provide apparatuses and methods related to performing a loop structure for operations performed in memory. An example...
Apparatuses including multiple read modes and methods for same
Apparatuses and methods including multiple read modes for reading data from a memory are described. An example apparatus includes a memory including a first...
Memory device power managers and methods
Memory devices and methods are described that include a stack of memory dies and an attached logic die. Method and devices described provide for power...
Methods and apparatuses including a string of memory cells having a first
select transistor coupled to a second...
Generally discussed herein are apparatuses and methods. One such apparatus includes a data line, a first memory cell and a first select transistor. The first...
Setting a default read signal based on error correction
The present disclosure includes apparatuses and methods related to setting a default read signal based on error correction. A number of methods can include...
Memory block quality identification in a memory
Methods of operating electronic systems having a memory include reading indications of memory block quality from a plurality of memory blocks of the memory in...
Methods and systems for imaging and cutting semiconductor wafers and other
Methods and systems for imaging and cutting semiconductor wafers and other microelectronic device substrates are disclosed herein. In one embodiment, a system...
Image sensor defect identification using optical flare
Embodiments described herein may operate to compare an illuminance corresponding to a signal from an image sensor array (ISA) element in a production imaging...
Apparatuses and methods for asymmetric bi-directional signaling
incorporating multi-level encoding
Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding are disclosed. An example apparatus may include first and...
Error correction methods and apparatuses using first and second decoders
Apparatuses and methods for error correcting data are provided. A first error correction code (ECC) decoder is configured to decode a first codeword to provide...
Controlling clock input buffers
An integrated circuit may have a clock input pin coupled to a buffer (24). The buffer may supply a clock signal (28) to an integrated circuit chip such as the...
Semiconductor constructions and methods of forming memory cells
Some embodiments include semiconductor constructions having stacks containing electrically conductive material over dielectric material. Programmable material...
Non-volatile resistive oxide memory cells and methods of forming
non-volatile resistive oxide memory cells
A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. The...
Solid state lighting device with different illumination parameters at
different regions of an emitter array
Solid state lighting (SSL) devices and methods of manufacturing such devices. One embodiment of an SSL device comprises a support and an emitter array having a...
Apparatuses having a vertical memory cell
Methods, apparatuses, and systems for providing a body connection to a vertical access device. The vertical access device may include a digit line extending...
Devices, systems, and methods related to removing parasitic conduction in
Semiconductor devices and methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes...
Cross-point memory and methods for fabrication of same
The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same....
Apparatuses and methods of communicating differential serial signals
including charge injection
Apparatuses and methods are disclosed, including an apparatus that includes a differential driver with charge injection pre-emphasis. One such apparatus...
Semiconductor devices comprising interconnect structures and methods of
Semiconductor devices comprise at least one integrated circuit layer, at least one conductive trace and an insulative material adjacent at least a portion of...
Fortification of charge-storing material in high-K dielectric environments
and resulting apparatuses
Memories, systems, and methods for forming memory cells are disclosed. One such memory cell includes a charge storage node that includes nanodots over a tunnel...
Memory cell sensing
This disclosure concerns memory cell sensing. One or more methods include determining a data state of a first memory cell coupled to a first data line,...
Apparatuses and methods for non-volatile memory programming schemes
Apparatuses and methods for a non-volatile memory scheme are described herein. An example apparatus may include a memory block including a plurality of...
Phase change memory in a dual inline memory module
Subject matter disclosed herein relates to management of a memory device.
Apparatuses and methods including memory access in cross point memory
Some embodiments include apparatuses and methods having a memory cell, first and second conductive lines configured to access the memory cell, and a switch...
Systems, and devices, and methods for programming a resistive memory cell
Embodiments disclosed herein may relate to programming a memory cell with a programming pulse that comprises a quenching period having different portions. The...
Apparatuses, sense circuits, and methods for compensating for a wordline
Apparatuses, sense circuits, and methods for compensating for a voltage increase on a wordline in a memory is described. An example apparatus includes a...
Memory devices, memory device operational methods, and memory device
Memory devices, memory device operational methods, and memory device implementation methods are described. According to one arrangement, a memory device...
Methods of operating storage systems including using a key to determine
whether a password can be changed
An embodiment of a method of operating a storage system includes combining a password, a first number, and a number of iterations to produce a first key,...
Memory apparatuses, computer systems and methods for ordering memory
Memory apparatuses that may be used for receiving commands and ordering memory responses are provided. One such memory apparatus includes response logic that is...
Data streaming for solid-state bulk storage devices
Methods facilitate data streaming in bulk storage devices by generating linked lists containing entries for both user data and metadata. These linked lists...
Multi-device memory serial architecture
Subject matter disclosed herein relates to memory devices comprising a memory array, a first port to interface with a memory controller directly or indirectly...
Power delivery circuitry
Embodiments of the present disclosure are directed to systems and methods for a memory device comprising a memory system and power delivery circuitry comprising...
Method of forming a metal chalcogenide material and methods of forming
memory cells including same
A method of forming a metal chalcogenide material. The method comprises exposing a metal to a solution comprising a chalcogenide element source compound and an...
Memory card systems comprising flexible integrated circuit element
packages, and methods for manufacturing said...
A memory card system may include a flexible integrated circuit device package, an upper flexible case, a lower flexible case, a wiring structure, an anisotropic...
Asymmetric chip-to-chip interconnect
Methods and apparatus apparatuses to transfer data between a first device and a second device are disclosed. In various embodiments, an apparatus includes a...
System and method for an accuracy-enhanced DLL during a measure
A clock generator having a delay locked loop and a delay control circuit. The delay locked loop receives an input clock signal and adjusts an adjustable delay...