Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: micron





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-7,569,484 Plasma and electron beam etching device and method
Methods and devices for selective etching in a semiconductor process are shown. Chemical species generated in a reaction chamber provide both a selective etching...
US-7,569,473 Methods of forming semiconductor assemblies
Apparatus and methods are disclosed relating to semiconductor assemblies. A semiconductor assembly includes an interposer which may be constructed from a...
US-7,569,468 Method for forming a floating gate memory with polysilicon local interconnects
Methods and apparatus are described to facilitate forming memory devices with low resistance polysilicon local interconnects that allow a smaller array feature...
US-7,569,453 Contact structure
This invention relates to contact structures for use in integrated circuits and methods of fabricating contact structures. In one embodiment, a contact structure...
US-7,569,418 Methods for securing packaged semiconductor devices to carrier substrates
A method for securing a semiconductor device to a carrier substrate includes inserting a semiconductor device with a plurality of stub contacts extending from a...
US-7,569,414 CMOS imager with integrated non-volatile memory
A CMOS imager and non-volatile memory are integrated on a single substrate along with logic and support circuitry for decoding and processing optical information...
US-7,569,314 Method for quartz bump defect repair with less substrate damage
A method for minimizing damage to a substrate while repairing a defect in a phase shifting mask for an integrated circuit comprising locating a bump defect in a...
US-7,569,311 Method of forming a pattern using a polarized reticle in conjunction with polarized light
Polarized reticles, photolithography systems utilizing a polarized reticle, and methods of using such a system are disclosed. A polarized reticle is formed...
US-7,568,970 Chemical mechanical polishing pads
The present invention provides a deformable pad useful for chemical mechanical polishing ("CMP"), a CMP apparatus incorporating the deformable pad of the present...
US-7,567,848 Speaker apparatus and a computer system incorporating same
An internal subwoofer apparatus is provided for mounting within a computer system. The computer system is a multi-media computer system that processes visual and...
US-7,567,477 Bias sensing in sense amplifiers through a voltage-coupling/decoupling device
Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The...
US-7,567,472 Memory block testing
A memory device is tested by programming a plurality of pages of a memory block of the memory device, determining a programming time for each page, determining a...
US-7,567,465 Power saving sensing scheme for solid state memory
Methods and apparatus are disclosed, such as those involving a solid state memory device. One such method includes selecting a plurality of memory cells in a...
US-7,567,462 Method and system for selectively limiting peak power consumption during programming or erase of non-volatile...
A power supply circuit is used to supply power having a limited peak magnitude to an array of non-volatile memory cells during programming or erasing of the...
US-7,567,461 Method and system for minimizing number of programming pulses used to program rows of non-volatile memory cells
A flash memory device programs cells in each row in a manner that minimizes the number of programming pulses that must be applied to the cells during...
US-7,567,455 Method and system for programming non-volatile memory cells based on programming of proximate memory cells
A multi-level non-volatile memory device programs cells in each row in a manner that takes into account the coupling from the programming of cells that are...
US-7,567,375 Hidden hinge MEMS device
The present invention relates to a method for manufacturing a MEMS device, including the actions of: providing a substrate having a back and front surface...
US-7,567,091 Method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer
A circuit for isolating a short-circuited integrated circuit (IC) formed on the surface of a semiconductor wafer from other ICs formed on the wafer that are...
US-7,566,907 Thin film transistors and semiconductor constructions
A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a...
US-7,566,620 DRAM including a vertical surround gate transistor
DRAM memory cells having a feature size of less than about 4F2 include vertical surround gate transistors that are configured to reduce any short channel effect...
US-7,566,601 Method of making a one transistor SOI non-volatile random access memory cell
One aspect of the present subject matter relates to a memory cell, or more specifically, to a one-transistor SOI non-volatile memory cell. In various...
US-7,566,600 SOI device with reduced drain induced barrier lowering
A CMOS device formed with a Silicon On Insulator (SOI) technology with reduced Drain Induced Barrier Lowering (DIBL) characteristics and a method for producing...
US-7,566,391 Methods and systems for removing materials from microfeature workpieces with organic and/or non-aqueous...
Methods and systems for removing materials from microfeature workpieces are disclosed. A method in accordance with one embodiment of the invention includes...
US-7,566,257 Method and system for transferring data to an electronic toy or other electronic device
A method for transferring data from a display device to an electronic device includes displaying a visual pattern on the display device. The visual pattern...
US-7,565,587 Background block erase check for flash memories
Memory devices and methods of operating memory devices provide for using differing potentials during erase verify operations facilitate normal erase operations...
US-7,565,039 Resistive heater for thermo optic device
Resistive heaters formed in two mask counts on a surface of a grating of a thermo optic device thereby eliminating one mask count from prior art manufacturing...
US-7,564,733 Memory device and method having programmable address configurations
A memory device includes a configurable address register having a first set of input buffers coupled to a first set on address bus terminals and a second set of...
US-7,564,731 Software refreshed memory device and method
A software refreshed memory device comprises a plurality of memory cells that must be periodically refreshed to avoid losing data. Preferably, the memory cells...
US-7,564,722 Memory system and method having volatile and non-volatile memory devices at same hierarchical level
A processor-based system includes a processor coupled to core logic through a processor bus. This includes a dynamic random access memory ("DRAM") memory buffer...
US-7,564,721 Method and apparatus for improving storage performance using a background erase
Disclosed are an apparatus, method, and computer readable medium configured for performing a background erase in a memory device. Included is the act of...
US-7,564,397 High slew rate amplifier, analog-to-digital converter using same, CMOS imager using the analog-to-digital...
An amplifier, which may be used in a pipelined analog-to-digital converter, includes a first amplifier stage driving a second amplifier stage. At least one...
US-7,564,279 Power on reset circuitry in electronic systems
One or more embodiments of the present disclosure provide methods, devices, and systems for operating power on reset (POR) circuitry. One method embodiment...
US-7,564,088 High-density single transistor vertical memory gain cell
A memory cell which is formed on a substrate of a first conductivity type. A pillar of the first conductivity type extends vertically upward from the substrate....
US-7,564,087 Merged MOS-bipolar capacitor memory cell
A high density vertical merged MOS-bipolar-capacitor gain cell is realized for DRAM operation. The gain cell includes a vertical MOS transistor having a source...
US-7,564,082 Gettering using voids formed by surface transformation
One aspect of this disclosure relates to a semiconductor structure, comprising a gettering region proximate to a device region in a semiconductor wafer. The...
US-7,563,730 Hafnium lanthanide oxynitride films
Electronic apparatus and methods of forming the electronic apparatus include a hafnium lanthanide oxynitride film on a substrate for use in a variety of...
US-7,563,723 Critical dimension control for integrated circuits
Methods of etching substrates with small critical dimensions and altering the critical dimensions are disclosed. In one embodiment, a sulfur oxide based plasma...
US-7,563,679 Reduction of field edge thinning in peripheral devices
A dielectric layer (e.g., an interpoly dielectric layer) is deposited over low and high voltage devices of a peripheral memory device. The dielectric behaves as...
US-7,563,666 Semiconductor structures including vertical diode structures and methods of making the same
Semiconductor structures and methods of making a vertical diode structure are provided. The vertical diode structure may have associated therewith a diode...
US-7,563,631 Reduced barrier photodiode / gate device structure for high efficiency charge transfer and reduced lag and...
A pixel cell having a reduced potential barrier near a region where a gate and a photodiode are in close proximity to one another, and a method for forming the...
US-7,563,157 Apparatus for conditioning chemical-mechanical polishing pads
An apparatus for conditioning a polishing pad, or conditioner, includes a supporting substrate and abrasive elements. The abrasive elements of the conditioner...
US-7,562,268 Method and apparatus for testing a memory device with compressed data using a single output
A method and apparatus for testing a memory device with compressed data using multiple clock edges is disclosed. In one embodiment of the present invention data...
US-7,562,178 Memory hub and method for memory sequencing
A memory module includes a memory hub coupled to several memory devices. The memory hub includes at least one performance counter that tracks one or more system...
US-7,561,938 Method for using data regarding manufacturing procedures integrated circuits (ICS) have undergone, such as...
An inventive method in an integrated circuit (IC) manufacturing process for using data regarding repair procedures conducted on ICs at probe to determine whether...
US-7,561,477 Data strobe synchronization circuit and method for double data rate, multi-bit writes
A data strobe synchronization circuit includes first and second logic circuits receiving global data strobe pulses and respective enable signal. A control...
US-7,561,472 NAND architecture memory with voltage sensing
A NAND architecture non-volatile memory voltage sensing data read/verify process and sense amplifier has been described that senses data in floating gate or...
US-7,561,469 Programming method to reduce word line to word line breakdown for NAND flash
A NAND architecture non-volatile memory device and programming process programs the various cells of strings of non-volatile memory cells by the application of...
US-7,561,466 Non-volatile memory copy back
Data move operations in a memory device are included that enable identification of data errors. During a write operation, identified errors are flagged and used...
US-7,560,959 Absolute value peak differential voltage detector circuit and method
A peak voltage detector is used to detect the absolute value of the peak differential amplitude of a differential input signal. The peak voltage detector...
US-7,560,956 Method and apparatus for selecting an operating mode based on a determination of the availability of internal...
A system and method to operate an electronic device, such as a memory chip, with an output driver circuit that is configured to include an ODT (On-Die...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.