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The present invention relates to an apparatus (100) for patterning a workpiece arranged at an image plane and sensitive to electromagnetic radiation, comprising...
Method and system for reducing mismatch between reference and intensity
paths in analog to digital converters...
A circuit for reducing a mismatch between a reference path to which a reference voltage is applied and an intensity path to which an intensity voltage is applied...
Clock signal distribution with reduced parasitic loading effects
Clock signal distribution systems with reduced parasitic loading effects are provided. A reference clock is frequency-divided to produce a lower frequency clock...
Output buffer and method having a supply voltage insensitive slew rate
An output buffer includes a final driver formed by first and second MOSFET transistors that alternately couple an output terminal to respective supply voltages....
Protective layer for corrosion prevention during lithography and etch
Forming a protective layer such as chromium, chrome alloys, nickel or cobalt as a cap over an aluminum film protects an underlying ITO layer from corrosion...
Semiconductor components and assemblies including vias of varying lateral
Methods for forming vias are disclosed. The methods include providing a substrate having a first surface and an opposing, second surface. A first opening, a...
Castellation wafer level packaging of integrated circuit chips
Systems and methods for packaging integrated circuit chips in castellation wafer level packaging are provided. The active circuit areas of the chips are coupled...
Semiconductor on insulator structure
An apparatus and a method for forming the apparatus include a semiconductor layer on an insulating substrate, where the substrate is a different material than...
Vertical gain cell
A vertical cell is realized. The cell includes a first vertical metal oxide semiconductor (MOS) transistor having a body between a drain region and a source...
Vertical wrap-around-gate field-effect-transistor for high density, low
voltage logic and memory array
A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by...
The invention encompasses methods of forming metal nitride proximate dielectric materials. The metal nitride comprises two portions, with one of the portions...
The invention includes a method of forming a rugged semiconductor-containing surface. A first semiconductor layer is formed over a substrate, and a second...
This invention includes methods of forming layers comprising epitaxial silicon, and field effect transistors. In one implementation, a method of forming a layer...
Agglomeration elimination for metal sputter deposition of chalcogenides
A method for fabricating chalcogenide materials on substrates, which reduces and/or eliminates agglomeration of materials on the chalcogenide materials; and...
Interconnect structures with bond-pads and methods of forming bump sites
Microelectronic workpieces that have bump sites over bond-pads and methods of fabricating such bump sites. One embodiment of such a workpiece, for example,...
Scalable gate and storage dielectric
Gate and storage dielectric systems and methods of their fabrication are presented. A passivated overlayer deposited between a layer of dielectric material and a...
Flash memory having a high-permittivity tunnel dielectric
A high permittivity tunneling dielectric is used in a flash memory cell to provide greater tunneling current into the floating gate with smaller gate voltages....
Methods for assembling semiconductor devices and interposers
A method for assembling one or more semiconductor devices with an interposer includes positioning the one or more semiconductor devices within a receptacle that...
Apparatus for improved delivery of metastable species
The invention includes a deposition system having a reservoir for containment of a metastable specie connected to a deposition chamber. The system includes a...
Methods and tools for controlling the removal of material from
Methods and apparatus for controlling the removal of material from microfeature workpieces in abrasive removal processes. An embodiment of such a method...
Data security for digital data storage
A computing system includes data encryption in the data path between a data source and data storage devices. The data storage devices may be local or they may be...
Low power cost-effective ECC memory system and method
A memory controller couples 32-bit data words to and from a DRAM. The DRAM generates error checking and correcting syndromes to check and correct read data. The...
Error detection and correction in a CAM
An error detection and correction circuit is connected to at least one memory bank of a CAM device. During background processing (i.e., when the CAM is not...
Testing system and method allowing adjustment of signal transmit timing
A test system includes respective clock domain crossing circuits coupling memory device signals to a memory device being tested. The clock domain crossing...
Audio volume control for computer systems
A computer system includes an audio chip to generate audio signals at a target volume level to be emitted as audio output by speakers. Also included in the...
Increased NAND flash memory read throughput
A method of reading sequential pages of flash memory from alternating memory blocks comprises loading data from a first page into a first primary data cache and...
Programming method for NAND flash
A NAND architecture non-volatile memory device and programming process is described that programs the various cells of strings of non-volatile memory cells...
Registration method and apparatus therefor
The present invention relates to a method to determine a position of at least one mark provided on a substrate, comprising the actions of: detecting a first mark...
Method and apparatus for converting parallel data to serial data in high
A method and apparatus to convert parallel data to serial data is provided. More specifically, there is provided a parallel-to-serial converter comprising a data...
Low voltage CMOS differential amplifier
There is provided a device including a PMOS differential amplifier and an NMOS differential amplifier. The NMOS differential amplifier is coupled to the PMOS...
Local coarse delay units
Methods, circuits, devices, and systems are provided, including embodiments with local coarse delay units. One embodiment includes generating a first delayed...
Current differential buffer
A memory device having a differential buffer is disclosed. In some embodiments, the memory device includes a differential buffer having a differential pair that...
On-chip substrate regulator test mode
An on-chip circuit for defect testing with the ability to maintain a substrate voltage at a level more positive or more negative than a normal negative operating...
Electrical connecting apparatus
A wiring path of a circuit board has a first vertical path portion penetrating the circuit board at its outer edge in its thickness direction and connected to a...
Strained Si/SiGe/SOI islands and processes of making same
A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An...
Combined volatile and non-volatile memory device with graded composition
A memory device is fabricated with a graded composition tunnel insulator layer. This layer is formed over a substrate with a drain and a source region. The...
Memory array with ultra-thin etched pillar surround gate access
transistors and buried data/bit lines
A memory array with data/bit lines extending generally in a first direction formed in an upper surface of a substrate and access transistors extending generally...
CMOS imager pixel designs
A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are...
Process of forming a semiconductor assembly having a contact structure and
A contact structure and a method of forming thereof for semiconductor devices or assemblies are described. The method provides process steps to create a contact...
Methods and apparatus for removing conductive material from a
A method and apparatus for removing conductive material from a microelectronic substrate is disclosed. One method includes disposing an electrolytic liquid...
Method of manufacturing a probe
In a probe manufacturing method, after a metal material for a probe is deposited on a base table, the probe can be detached from the base table relatively easily...
Text based markup language resource interface
A software control method and apparatus for displaying a text based markup language interface. The interface can interact with a computer to provide reference...
Non-volatile memory with error detection
Data move operations in a memory device are described that enable identification of data errors. Error detection circuitry in the memory device can be operated...
DRAM power bus control
A dynamic random access memory (DRAM) is provided that has separate array and peripheral power busing to isolate array noise from peripheral circuits such as...
Sharing of microlenses among pixels in image sensors
A microlens array having microlenses that correspond to more than one color filter and underlying pixel. In one particular embodiment, each microlens is formed...
Methods of reducing data dependent noise
Techniques for controlling a driver to reduce data dependent noise, such as simultaneous switching effects and cross-talk effects. A plurality of drivers may...
Methods and apparatus for adaptively adjusting a data receiver
Methods are provided to reduce offsets and timing skews in data signals captured in a data receiver by adaptively adjusting a transition threshold of the data...
Integrated circuit load board and method having on-board test circuit
An integrated circuit load board includes a substrate on which a plurality of integrated circuit sockets and an integrated test circuit are mounted. The...
Intrinsic thermal enhancement for FBGA package
A semiconductor device for dissipating heat generated by a die during operation and having a low height profile, a semiconductor die package incorporating the...
Reproducible resistance variable insulating memory devices having a shaped
The present invention relates to the use of a shaped bottom electrode in a resistance variable memory device. The shaped bottom electrode ensures that the...