Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: micron





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-7,514,776 Semiconductor/printed circuit board assembly, and computer system
A method of forming a computer system and a printed circuit board assembly, are provided comprising first and second semiconductor dies and an intermediate...
US-7,514,366 Methods for forming shallow trench isolation
A method of depositing dielectric material into sub-micron spaces and resultant structures is provided. After a trench is etched in the surface of a wafer, a...
US-7,514,324 Selective epitaxy in vertical integrated circuit
Integrated circuit components are described that are formed using selective epitaxy such that the integrated circuit components, such as transistors, are...
US-7,514,291 Methods relating to singulating semiconductor wafers and wafer scale assemblies
Methods relating to singulation of dice from semiconductor wafers. Trenches or channels are formed in the bottom surface of a semiconductor wafer, corresponding...
US-7,513,182 Integrated circuit package separators
Integrated circuit package separator for separating integrated circuit packages from a board. A base having a plurality of pins extending upwardly therefrom is...
US-7,512,910 Integrated circuit design using charge pump modeling
Circuit models for the simulation of charge pumps facilitate design of integrated circuits containing charge pumps. Such models facilitate accurate simulation of...
US-7,512,909 Read strobe feedback in a memory system
A controller circuit is coupled to a memory device over a data/IO bus and a control bus. The controller circuit generates a read enable signal that is...
US-7,512,763 Transparent SDRAM in an embedded environment
A transparent memory array has a processor and a plurality of memory banks, each memory bank being directly connected to the processor. The memory array has...
US-7,512,507 Die based trimming
Methods and structures are described to provide trims for die on a wafer. The trims are set on a die-by-die basis instead of a wafer basis. Accordingly, the...
US-7,512,170 Method of forming mirrors by surface transformation of empty spaces in solid state materials
A multi-layered reflective mirror formed of spaced-apart plate-shaped empty space patterns formed within a substrate is disclosed. The plurality of plate-shaped...
US-7,512,029 Method and apparatus for managing behavior of memory devices
A method of managing power consumption by a memory in a memory device includes determining whether the device is powered by a depletable power supply, and if it...
US-7,512,025 Open digit line array architecture for a memory array
A system and method for sensing a data state stored by a memory cell that includes coupling a first digit line and a second digit line to a precharge voltage and...
US-7,512,019 High speed digital signal input buffer and method using pulsed positive feedback
An input buffer generates an output signal corresponding to a digital input signal. The input buffer is coupled to a feedback circuit. The feedback circuit...
US-7,511,994 MEM suspended gate non-volatile memory
A carrier storage node such as a floating gate is formed on a moving electrode with a control gate to form a suspended gate non-volatile memory, reducing...
US-7,511,984 Phase change memory
A PCRAM cell has a high resistivity bottom electrode cap to provide partial heating near the interface between the cell and the bottom electrode, preventing...
US-7,511,644 Variable resistance logic
A system comprising a control logic that generates a code having n digits, a translation logic coupled to the control logic that translates the code to a new...
US-7,511,534 Circuits, devices, systems, and methods of operation for a linear output driver
Embodiments are described for an output driver circuit capable of maintaining a substantially constant output impedance across a wide range of output voltages....
US-7,511,531 Temperature-compensated output buffer
A temperature-compensated output buffer circuit is disclosed, which includes a pull-up circuit including a first pull-up transistor for providing a first pull-up...
US-7,511,520 Universal wafer carrier for wafer level die burn-in
A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consisting of two halves. The first half of the test fixture is a wafer...
US-7,511,364 Floating lead finger on a lead frame, lead frame strip, and lead frame assembly including same
A semiconductor device assembly includes a semiconductor device and a lead frame having lead fingers for connection to the semiconductor device. The lead frame...
US-7,511,363 Copper interconnect
An improved wire bond is provided with the bond pads of semiconductor devices and the lead fingers of lead frames or an improved conductive lead of a TAB tape...
US-7,511,356 Voltage-controlled semiconductor inductor and method
A voltage-controlled semiconductor inductor and method is provided. According to various embodiments, the voltage-controlled inductor includes a conductor...
US-7,511,354 Well for CMOS imager and method of formation
A well region of a first conductivity type located in a substrate of the first conductivity type and below about half the channel length of an electrically...
US-7,511,341 SOI device having increased reliability and reduced free floating body effects
The present invention provides a novel method for increasing the amount of deuterium incorporated into trap sites of a transistor device during a deuterium...
US-7,511,326 ALD of amorphous lanthanide doped TiO.sub.x films
The use of atomic layer deposition (ALD) to form an amorphous dielectric layer of titanium oxide (TiO.sub.x) doped with lanthanide elements, such as samarium,...
US-7,511,262 Optical device and assembly for use with imaging dies, and wafer-label imager assembly
Microelectronic imagers with integrated optical devices and methods for manufacturing imagers. The imagers, for example, typically have an imaging unit including...
US-7,510,983 Iridium/zirconium oxide structure
Embodiments of an electronic apparatus and embodiments for methods of forming the electronic apparatus include a conductive layer having an iridium-based layer,...
US-7,510,966 Electrically conductive line, method of forming an electrically conductive line, and method of reducing...
The invention includes an electrically conductive line, methods of forming electrically conductive lines, and methods of reducing titanium silicide agglomeration...
US-7,510,961 Utilization of energy absorbing layer to improve metal flow and fill in a novel interconnect structure
A method for manufacturing an interconnect structure situated on a semiconductor wafer having a substrate assembly thereon. The interconnect structure is formed...
US-7,510,954 Memory array with surrounding gate access transistors and capacitors with global and staggered local bit lines
A memory array with staggered local data/bit lines extending generally in a first direction formed in an upper surface of a substrate and memory cell access...
US-7,510,897 Photodiode with self-aligned implants for high quantum efficiency and method of formation
A pinned photodiode with a pinned surface layer formed by a self-aligned angled implant is disclosed. The angle of the implant may be tailored to provide an...
US-7,509,543 Circuit and method for error test, recordation, and repair
In a memory device, an on-die register is provided that is configured to store a row address as well as a column address of a memory cell that fails a test....
US-7,509,474 Robust index storage for non-volatile memory
A non-volatile memory data address translation scheme is described that utilizes a hierarchal address translation system that is stored in the non-volatile...
US-7,509,005 Resistive heater for thermo optic device
Resistive heaters formed in two mask counts on a surface of a grating of a thermo optic device thereby eliminating one mask count from prior art manufacturing...
US-7,508,722 Memory device having strobe terminals with multiple functions
A memory device has data transceivers, write strobe transceivers, and read strobe transceivers. The data transceivers transfer input data to the memory device...
US-7,508,708 NAND string with a redundant memory cell
The invention provides methods and apparatus. A NAND memory block has a source select line for selectively coupling one or more strings of series-coupled...
US-7,508,648 Atomic layer deposition of Dy doped HfO.sub.2 films as gate dielectrics
The use of atomic layer deposition (ALD) to form a dielectric layer of hafnium oxide (HfO.sub.2) doped with dysprosium (Dy) and a method of fabricating such a...
US-7,508,075 Self-aligned poly-metal structures
A semiconductor structure is provided comprising a self-aligned poly-metal stack formed over a semiconductor substrate where the interface between an oxidation...
US-7,508,074 Etch stop layer in poly-metal structures
In accordance with one embodiment of the present invention, a semiconductor structure is provided comprising a poly-metal stack formed over a semiconductor...
US-7,508,025 Atomic layer deposition of metal oxide and/or low asymmetrical tunnel barrier interpoly insulators
Structures and methods for programmable array type logic and/or memory devices with asymmetrical low tunnel barrier intergate insulators are provided. The...
US-7,508,024 Three dimensional flash cell
A floating gate memory cell includes isolation regions between adjacent cells, and a staggered pattern of columns of cells. Word lines are formed parallel to...
US-7,508,016 CMOS imager having on-chip ROM
A CMOS image sensor formed on a chip has a ROM disposed on the chip for recording pixel defect locations, chip-by-chip variations such as bias, and other...
US-7,507,672 Plasma etching system and method
A system and a process for plasma etching a semiconductor device. The technique comprises periodically applying a heightened voltage bias during the plasma...
US-7,506,226 System and method for more efficiently using error correction codes to facilitate memory device testing
A memory device includes an ECC and test circuit. In a normal mode, the circuit performs ECC conventional functions. In a test mode, the least significant bit of...
US-7,506,146 Fast and compact circuit for bus inversion
A bussed system with a fast and compact majority voter in the circuitry responsible for the bus inversion decision. The majority voter is implemented in analog...
US-7,506,126 Detection circuit for mixed asynchronous and synchronous memory operation
A memory access mode detection circuit and method for detecting and initiating memory access modes for a memory device The memory access mode detection circuit...
US-7,505,357 Column/row redundancy architecture using latches programmed from a look up table
A scheme for defective memory column or row substitution is disclosed which uses a programmable look-up table to store new addresses for column selection when...
US-7,505,341 Low voltage sense amplifier and sensing method
Systems and methods of sensing a data state coupled to a digit line and for coupling a digit line to a sense amplifier. In sensing the data state coupled to the...
US-7,505,330 Phase-change random access memory employing read before write for resistance stabilization
An improved architecture and method for operating a PCRAM integrated circuit is disclosed which seeks to minimize degradation in the resistance of the phase...
US-7,505,323 Programming memory devices
A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.