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Patent # Description
US-7,505,317 Method, apparatus, and system for providing initial state random access memory
A memory device comprising memory cells having volatile and non-volatile memory portions. The volatile memory portion of each cell includes circuitry for...
US-7,505,309 Static RAM memory cell with DNR chalcogenide devices and method of forming
An SRAM memory device having improved stability including two series connected devices, at least one of the devices being a chalcogenide device exhibiting...
US-7,504,843 Probe unit substrate
A ceramic substrate has, on its surface, a multilayer wiring division, on which micro cantilever type probes are fixed. The multilayer wiring division has the...
US-7,504,767 Electrode structures, display devices containing the same
An electrode structure for a display device comprising a gate electrode proximate to an emitter and a focusing electrode separated from the gate electrode by an...
US-7,504,730 Memory elements
Annular, linear, and point contact structures are described which exhibit a greatly reduced susceptibility to process deviations caused by lithographic and...
US-7,504,687 Atomic layer deposition of metal oxide and/or low asymmetrical tunnel barrier interpoly insulators
Structures and methods for programmable array type logic and/or memory devices with asymmetrical low tunnel barrier intergate insulators are provided. The...
US-7,504,685 Oxide epitaxial isolation
Non-volatile memory cell structures are described that are formed by a method including forming a first oxide layer on a horizontal strained substrate, forming...
US-7,504,674 Electronic apparatus having a core conductive structure within an insulating layer
Electronic devices are constructed by a method that includes forming a first conductive layer in an opening in a multilayer dielectric structure supported by a...
US-7,504,310 Semiconductors bonded on glass substrates
A method includes providing a glass substrate and bonding a semiconductor layer to the glass substrate. The semiconductor layer is formed to a thickness such...
US-7,504,298 Method for forming memory cell and device
A memory cell, device, and system include a memory cell having a shared digitline, a storage capacitor, and a plurality of access transistors configured to...
US-7,504,285 Carrierless chip package for integrated circuit devices, and methods of making same
Disclosed is a carrierless chip package for integrated circuit devices, and various methods of make same. In one illustrative embodiment, the device includes an...
US-7,504,284 Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing...
A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic...
US-7,503,046 Method of obtaining interleave interval for two data values
A method of determining an interleave pattern for n lots of A and y lots of B, when n plus y equals a power of two such that the expression 2.sup.z-n may be used...
US-7,503,002 Text based markup language resource interface
A software control method and apparatus for displaying a text based markup language interface. The interface can interact with a computer to provide reference...
US-7,502,659 Sorting a group of integrated circuit devices for those devices requiring special testing
A method for sorting integrated circuit (IC) devices of the type having a fuse identification (ID) into those devices requiring enhanced reliability testing and...
US-7,502,058 Imager with tuned color filter
An optimized color filter array is formed in, above or below a one or more damascene layers. The color filter array includes filter regions which are configured...
US-7,501,971 Analog-to-digital converter with resistor ratio
Various embodiments disclose apparatus, systems, and methods operating with a first circuit branch with transistors coupled in series between first and second...
US-7,501,963 Balanced data bus inversion
A method and apparatus for balancing an output load using data bus inversion is disclosed. In brief, one such technique comprises measuring the "balance" of data...
US-7,501,691 Trench insulation structures including an oxide liner and oxidation barrier
A method of depositing dielectric material into sub-micron spaces and resultant structures is provided. After a trench is etched in the surface of a wafer, a...
US-7,501,684 Methods of forming semiconductor constructions
The invention includes a transistor device having a semiconductor substrate with an upper surface. A pair of source/drain regions are formed within the...
US-7,501,676 High density semiconductor memory
A memory cell, array and device include cross-shaped active areas and polysilicon gate areas disposed over arm portions of adjacent cross-shaped active areas....
US-7,501,672 Method and structure for a self-aligned silicided word line and polysilicon plug during the formation of a...
A method used to form a semiconductor device provides a silicide layer on a plurality of transistor word lines and on a plurality of conductive plugs. In one...
US-7,501,329 Wafer gettering using relaxed silicon germanium epitaxial proximity layers
One aspect of this disclosure relates to a method for creating proximity gettering sites in a semiconductor wafer. In various embodiments of this method, a...
US-7,501,313 Method of making semiconductor BGA package having a segmented voltage plane
A semiconductor device assembly and method of making the device are disclosed. The assembly comprises a semiconductor die attached to an electrically conductive...
US-7,501,309 Standoffs for centralizing internals in packaging process
A semiconductor device, semiconductor die package, mold tooling, and methods of fabricating the device and packages are provided. In one embodiment, the...
US-7,500,858 Portable electronic device with built-in terminal cover structure
A portable electronic device including a housing having a receptacle for at least one semiconductor die, a terminal carried by the housing and operably coupled...
US-7,500,731 Printer and print control method
In a printer, an MPU makes a flash ROM store a temperature read by a temperature sensor at the time of setting of a correction value and a misalignment...
US-7,499,983 Web dispatch service
A system and method for accessing an application server includes sending a service command from a requestor to a dispatch server, processing the service command...
US-7,499,362 Techniques for storing accurate operating current values
A technique for storing accurate operating current values using programmable elements on memory devices. More specifically, programmable elements, such as...
US-7,499,330 Programming method for NAND EEPROM
A NAND architecture non-volatile memory device and programming process is described that programs the various cells of strings of non-volatile memory cells by...
US-7,499,329 Flash memory array using adjacent bit line as source
A memory array having a plurality of flash memory cells arranged in rows and columns. A plurality of bit lines couple the columns such that alternate bit lines...
US-7,499,302 Noise reduction in a CAM memory cell
A dynamic CAM cell has features that reduce the effect of noise within a CAM array. By shielding the matchline from the wordline, noise transmitted from the...
US-7,498,875 Technique to improve the gain and signal to noise ratio in CMOS switched capacitor amplifiers
The present invention comprises switched capacitor amplifiers including positive feedback on semiconductor devices, wafers, and systems incorporating same and...
US-7,498,759 Semiconductor wafer processing accelerometer
An end effector of a robot tool that includes accelerometers and methods to sense end effector motion. A semiconductor substrate or similar object may be...
US-7,498,675 Semiconductor component having plate, stacked dice and conductive vias
A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an...
US-7,498,670 Semiconductor structures having electrophoretically insulated vias
Methods are provided for creating lined vias in semiconductor substrates. Using electrophoretic deposition techniques, micelles of a lining material are...
US-7,498,647 Packaged microelectronic imagers and methods of packaging microelectronic imagers
Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in...
US-7,498,629 Stud electrode and process for making same
A process of making a stud capacitor structure is disclosed. The process includes embedding the stud in a dielectric stack. In one embodiment, the process...
US-7,498,606 Microelectronic imaging units and methods of manufacturing microelectronic imaging units
Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one...
US-7,498,265 Epitaxial silicon growth
Memory cell structures, including PSOIs, NANDs, NORs, FinFETs, etc., and methods of fabrication have been described that include a method of epitaxial silicon...
US-7,498,260 Pass through via technology for use during the manufacture of a semiconductor device
A method for forming vias which pass through a semiconductor wafer substrate assembly such as a semiconductor die or wafer allows two different types of...
US-7,498,258 Through-hole conductors for semiconductor substrates and method for making same
A method, structure and system for forming a through-hole conductor in a semiconductor substrate includes forming a hole having an inner surface from a first...
US-7,498,247 Atomic layer deposition of Hf3N4/HfO2 films as gate dielectrics
The use of atomic layer deposition (ALD) to form a dielectric layer of hafnium nitride (Hf.sub.3N.sub.4) and hafnium oxide (HfO.sub.2) and a method of...
US-7,498,240 Microfeature workpieces, carriers, and associated methods
Microfeature workpieces, carriers, and associated methods are disclosed. In a particular embodiment, one method for processing a microfeature workpiece can...
US-7,498,231 Multiple data state memory cell
A programmable multiple data state memory cell including a first electrode layer formed from a first conductive material, a second electrode layer formed from a...
US-7,498,230 Magnesium-doped zinc oxide structures and methods
Methods of forming transparent conducting oxides and devices formed by these methods are shown. Monolayers that contain zinc and monolayers that contain...
US-7,498,057 Deposition methods
A deposition method includes positioning a substrate within a deposition chamber defined at least in part by chamber walls. At least one of the chamber walls...
US-7,497,958 Methods of forming capacitors
The invention includes methods of forming reticles configured for imprint lithography, methods of forming capacitor container openings, and methods in which...
US-7,497,825 Data download to imager chip using image sensor as a receptor
An imaging device having a CMOS photosensor array for capturing images is described in which the array is also used to input programming and/or data used to...
US-7,497,005 Method for forming an inductor
A method of fabricating an inductor includes selecting a substrate, depositing a layer of magnetic material on the substrate, depositing an insulating layer on...
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