Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: micron





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-7,449,368 Technique for attaching die to leads
A semiconductor die assembly comprising a semiconductor die with bond pads, a plurality of leads which extend across the semiconductor die and terminates over...
US-D580,434 Mobile card reader
US-7,448,038 Method for using filtering to load balance a loop of parallel processing elements
One aspect of the present invention relates to a method for balancing the load of a parallel processing system having a plurality of parallel processing elements...
US-7,447,974 Memory controller method and system compensating for memory cell data losses
A computer system includes a memory controller coupled to a memory module containing several DRAMs. The memory module also includes a non-volatile memory storing...
US-7,447,973 Memory controller method and system compensating for memory cell data losses
A computer system includes a memory controller coupled to a memory module containing several DRAMs. The memory module also includes a non-volatile memory storing...
US-7,447,847 Memory device trims
Methods and apparatus are provided. A memory device has a memory array, base trim circuitry adapted to store base control parameter values common to the memory...
US-7,447,720 Method for finding global extrema of a set of bytes distributed across an array of parallel processing elements
A method for finding an extrema for an n-dimensional array having a plurality of processing elements, the method includes determining within each of the...
US-7,447,327 Flexible PCB voice coil connector
In an electroacoustic transducer, a pair of coil terminals elongating from a voice coil are electrically connected to a pair of terminal members attached to a...
US-7,447,240 Method and system for synchronizing communications links in a hub-based memory system
A method is disclosed for synchronizing communications links in a memory hub system. The system includes a system controller and a plurality of memory hubs...
US-7,447,106 Delay stage-interweaved analog DLL/PLL
A methodology is disclosed that enables the delay stages of an analog delay locked loop (DLL) or phase locked loop (PLL) to be programmed according to the...
US-7,447,085 Multilevel driver
The present disclosure includes various method, device, and system embodiments for multilevel driving of rowlines and/or wordlines. One such method embodiment...
US-7,446,857 Image forming method and apparatus
An acousto-optic cell is used in a method and device for patterning a workpiece, for exposing a radiation sensitive layer on a workpiece such as a mask or a...
US-7,446,855 Methods and apparatuses for configuring radiation in microlithographic processing of workpieces using an...
Methods and apparatuses for configuring radiation used in microlithographic processing of workpieces are disclosed herein. One particular embodiment of such a...
US-7,446,812 Wide dynamic range operations for imaging
Embodiments provide a method and apparatus that achieve wide dynamic range operation of an image sensor. In an array of pixel cells, first charge is accumulated...
US-7,446,807 Imager pixel with capacitance for boosting reset voltage
A pixel cell in which a capacitance is coupled between a storage node and a row select transistor and another capacitance is coupled between a storage node and a...
US-7,446,610 Low voltage CMOS differential amplifier
A low voltage CMOS differential amplifier is provided. More specifically, in one embodiment, a device comprising a differential pair is provided. A self-biased...
US-7,446,580 System and method to improve the efficiency of synchronous mirror delays and delay locked loops
A phase detection system for use with a synchronous mirror delay or a delay-locked loop in order to reduce the number of delay stages required, and therefore...
US-7,446,415 Method for filling electrically different features
Methods of electroless filling electrically different features such as contact openings to form interconnects and conductive contacts, and semiconductor devices,...
US-7,446,393 Co-sputter deposition of metal-doped chalcogenides
The present invention is related to methods and apparatus that allow a chalcogenide glass such as germanium selenide (Ge.sub.xSe.sub.1-x) to be doped with a...
US-7,446,385 Methods of fabricating optical packages, systems comprising the same, and their uses
Methods and apparatuses for forming optical packages, and intermediate structures resulting from the same are disclosed, which provide an optical element over a...
US-7,446,372 DRAM tunneling access transistor
In one embodiment, a first transistor is comprised of a first p+ source region doped in an n-well in the substrate and a first n+ drain region doped on one side...
US-7,446,368 Deposition of metal oxide and/or low asymmetrical tunnel barrier interpoly insulators
Structures and methods for programmable array type logic and/or memory devices with asymmetrical low tunnel barrier intergate insulators are provided. The...
US-7,446,363 Capacitor including a percentage of amorphous dielectric material and a percentage of crystalline dielectric...
The invention comprises integrated circuitry and to methods of forming capacitors. In one implementation, integrated circuitry includes a capacitor having a...
US-7,446,357 Split trunk pixel layout
A pixel array architecture having multiple pixel cells arranged in a split trunk pixel layout and sharing common pixel cell components. The array architecture...
US-7,446,351 Transistor structures and transistors with a germanium-containing channel
A transistor structure includes a first undoped, silicon-containing channel layer, a buried germanium channel, and a second undoped, silicon-containing channel...
US-7,446,277 Method for sorting integrated circuit devices
A method for sorting integrated circuit (IC) devices of the type having a substantially unique identification (ID) code, such as a fuse ID, including...
US-7,446,028 Multi-component integrated circuit contacts
An integrated circuit connection is describe that includes a first, securing member and a second, connection member. The first member, in an embodiment, is a...
US-7,445,996 Low resistance peripheral contacts while maintaining DRAM array integrity
A process and apparatus directed to forming low resistance contacts in both the memory cell array and peripheral logic circuitry areas of a semiconductor device,...
US-7,445,991 Methods of forming a plurality of capacitors
The invention includes methods of forming a plurality of capacitors. In one implementation, a plurality of capacitor electrode openings is formed over a...
US-7,445,990 Methods of forming a plurality of capacitors
A plurality of capacitor electrode openings is formed within capacitor electrode-forming material. A first set of the openings is formed to a depth which is...
US-7,445,973 Transistor surround gate structure with silicon-on-insulator isolation for memory cells, memory arrays, memory...
A transistor surround gate structure and a method of forming thereof on a semiconductor assembly are described. The transistor surround gate structure is formed...
US-7,445,951 Trench photosensor for a CMOS imager
A trench photosensor for use in a CMOS imager having an improved charge capacity. The trench photosensor may be either a photogate or photodiode structure. The...
US-7,444,934 Supercritical fluid-assisted direct write for printing integrated circuits
High resolution patterns provided on a surface of a semiconductor substrate and methods of direct printing of such high resolution patterns are disclosed. The...
US-7,444,616 Method for error reduction in lithography
The present invention relates to a method and a system for predicting and/or measuring and correcting geometrical errors in lithography using masks, such as...
US-7,444,579 Non-systematic coded error correction
Improved memory devices, circuitry, and data methods are described that facilitate the detection and correction of data in memory systems or devices by encoding...
US-7,444,559 Generation of memory test patterns for DLL calibration
A system and method to generate memory test patterns for the calibration of a delay locked loop (DLL) using pseudo random bit sequences (PRBS) generated through...
US-7,444,550 System and method for communicating a software-generated pulse waveform between two servers in a network
A method of monitoring a status condition of a first server with a second server in a server network, and also providing synchronization and messaging between...
US-7,444,537 System and method for communicating a software-generated pulse waveform between two servers in a network
A method of monitoring a status condition of a first server with a second server in a server network, and also providing synchronization and messaging between...
US-7,444,458 Method for assigning addresses to memory devices
A memory system having a memory controller and several separate memory devices connected to the controller by a system bus. The memory devices each included an...
US-7,444,030 Image encoding with dynamic buffer-capacity-level-based compression adjustment
Methods, systems, and computer programs for encoding images are described. In one aspect, quantized frequency domain vectors are sequentially generated from a...
US-7,443,761 Loop filtering for fast PLL locking
Methods, circuits, devices, and systems are provided for phase locked loop (PLL) locking. A method of locking a PLL includes locking a delay locked loop (DLL)...
US-7,443,750 Switched capacitor DRAM sense amplifier with immunity to mismatch and offsets
A switched capacitor sense amplifier includes capacitively coupled input, feedback, and reset paths to provide immunity to the mismatches in transistor...
US-7,443,749 Switched capacitor DRAM sense amplifier with immunity to mismatch and offsets
A switched capacitor sense amplifier includes capacitively coupled input, feedback, and reset paths to provide immunity to the mismatches in transistor...
US-7,443,743 Method and system for improved efficiency of synchronous mirror delays and delay locked loops
A plurality of improved memory systems employing a phase detection system in conjunction with either a synchronous mirror delay or a delay-locked loop, and...
US-7,443,715 SRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators
Structures and methods are provided for SRAM cells having a novel, non-volatile floating gate transistor, e.g. a non-volatile memory component, within the cell...
US-7,443,437 Image sensor with a gated storage node linked to transfer gate
A CMOS imaging system with increased charge storage of pixels yet decreased physical size, kTC noise and active area. A storage node is connected to the transfer...
US-7,443,427 Wide dynamic range linear-and-log active pixel
A pixel circuit having an improved dynamic range is disclosed. When incoming light detected by the photodiode is strong, the accumulated (integrated) charge on a...
US-7,443,219 Phase interpolation apparatus, systems, and methods
A phase interpolator circuit may comprise a multiplexer circuit (MUX) coupled to a plurality of clock signals at MUX inputs and may provide a first clock signal...
US-7,443,216 Trimmable delay locked loop circuitry with improved initialization characteristics
Disclosed herein is improved delay locked loop (DLL) initialization circuitry that alters the measurement used to initialize the variable delay line's delay...
US-7,443,038 Flip-chip image sensor packages
The present invention provides flip-chip packaging for optically interactive devices such as image sensors and methods of assembly. In a first embodiment of the...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.