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In one aspect, the invention includes a method of forming a material within an opening, comprising: a) forming an etch-stop layer over a substrate, the etch-stop...
Low resistance semiconductor process and structures
A process for forming a semiconductor device comprises the steps of providing a semiconductor substrate assembly comprising a semiconductor wafer having an...
NROM flash memory devices on ultrathin silicon
An NROM flash memory cell is implemented in an ultra-thin silicon-on-insulator structure. In a planar device, the channel between the source/drain areas is...
Source lines for NAND memory devices
A NAND memory device has a source line connected to two or more columns of serially-connected floating-gate transistors. The source line includes a first...
Semiconductor manufacturing apparatus for modifying-in-film stress of thin
films, and product formed thereby
An apparatus for depositing a thin film on a substrate and product produced thereby are disclosed. In particular, deposition of the thin film is carried out on...
System and method for reducing shorting in memory cells
An MRAM device includes an array of magnetic memory cells having an upper conductive layer and a lower conductive layer separated by a barrier layer. To reduce...
Method and apparatus for imager quality testing
An apparatus and method of detecting a defect in an imager die package. The method comprises the steps of exposing the imager die package to light at a first...
Method of forming conductive metal silicides by reaction of metal with
The invention includes methods of forming conductive metal silicides by reaction of metal with silicon. In one implementation, such a method includes providing a...
Device having contact pad with a conductive layer and a conductive
A method and apparatus is disclosed for sequential processing of integrated circuits, particularly for conductively passivating a contact pad with a material...
Semiconductor substrates including I/O redistribution using wire bonds and
anisotropically conductive film,...
Methods and apparatus for eliminating wire sweep and shorting while avoiding the use of under-bump metallization and high cost attendant to the use of...
Method to chemically remove metal impurities from polycide gate sidewalls
An embodiment includes a process of forming a gate stack that acts to resist the redeposition to the semiconductive substrate of mobilized metal such as from a...
Methods of forming conductive interconnects, and methods of depositing
The invention includes methods of electroless plating of nickel selectively on exposed conductive surfaces relative to exposed insulative surfaces. The...
Methods of forming transistor devices associated with
The invention encompasses a method of forming a semiconductor on-insulator construction. A substrate is provided. The substrate includes a ...
Method for fabricating packaged die
Methods for forming an edge contact on a die and edge contact structures are described. The edge contacts on the die do not increase the height of the die. The...
Method of forming a capacitor
A carbon containing masking layer is patterned to include a plurality of container openings therein having minimum feature dimensions of less than or equal to...
Method of forming a field effect transistor including depositing and
removing insulative material effective to...
The invention includes methods of forming field effect transistors. In one implementation, a method of forming a field effect transistor having a gate comprising...
Methods of forming SRAM constructions
The invention includes SRAM constructions comprising at least one transistor device having an active region extending into a crystalline layer comprising Si/Ge....
Stacked die in die BGA package
Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
Method of fabricating an imaging device for collecting photons
A photon collector has a reflecting metal layer to increase photon collection efficiency in a solid state imaging sensor. The reflecting metal layer reflects...
Systems and methods for mechanical and/or chemical-mechanical polishing of
Systems and methods for polishing microfeature workpieces. In one embodiment, a method includes determining a status of a characteristic of a microfeature...
Method and apparatus for data transfer
A memory system and method according to various aspects of the present invention comprises a memory and an adaptive timing system for controlling access to the...
Method and apparatus for initialization of read latency tracking circuit
in high-speed DRAM
A method of synchronizing counters in two different clock domains within a memory device is comprised of generating a start signal for initiating production of a...
Write latency tracking using a delay lock loop in a synchronous DRAM
A method and circuitry for improved write latency tracking in a SDRAM is disclosed. In one embodiment, a delay locked loop is used in the command portion of the...
Programming flash memories
A flash memory device has an array of flash memory cells, a detector for detecting an external voltage applied to the flash memory device, and a command control...
Apparatus and method for controlling a delay- or phase-locked loop as a
function of loop frequency
A method and circuitry for a Delay Locked Loop (DLL) or a phase Locked Loop (PLL) is disclosed, which improves the loop stability at high frequencies and allows...
Method for optimizing probe card design
A method is presented of designing semiconductor probe cards to have the optimum number and placement of die probe sites for function testing integrated circuit...
System and method for testing integrated circuit timing margins
An integrated circuit load board includes a substrate on which a plurality of integrated circuit sockets and an integrated test circuit are mounted. The...
Semiconductor dice having back side redistribution layer accessed using
through-silicon vias, methods
An apparatus and method of rerouting redistribution lines from an active surface of a semiconductor substrate to a back surface thereof and assembling and...
Substrate, semiconductor die, multichip module, and system including a via
structure comprising a plurality of...
A method of forming a multiconductor via includes forming at least one seed layer in at least one through-hole of a substrate, selectively patterning the seed...
Electrical devices with multi-walled recesses
The invention relates to a vertical transistor and an oxidation process that achieves a substantially curvilinear recess bottom. The recess serves as the gate...
Memory devices with dual-sided capacitors
A dual-sided HSG capacitor and a method of fabrication are disclosed. A thin native oxide layer is formed between a doped polycrystalline layer and a layer of...
Memory circuitry with oxygen diffusion barrier layer received over a well
A method of forming memory circuitry having a memory array having a plurality of memory capacitors and having peripheral memory circuitry operatively configured...
Masked spacer etching for imagers
The invention relates to a dual masked spacer etch for improved dark current performance in imagers. After deposition of spacer material such as oxide, N-channel...
Imaging device having a pixel cell with a transparent conductive
interconnect line and the method of making the...
The invention relates to an imaging device having a pixel cell with a transparent conductive material interconnect line for focusing incident light onto a...
Use of gate electrode workfunction to improve DRAM refresh
This invention relates to a method and resulting structure, wherein a DRAM may be fabricated by using silicon midgap materials for transistor gate electrodes,...
Methods of selectively removing silicon
An etch solution that comprises tetramethylammonium hydroxide ("TMAH") and at least one organic solvent. The etch solution may be substantially free of water....
Methods of forming conductive materials
The invention includes a method of forming a metal-comprising mass for a semiconductor construction. A semiconductor substrate is provided, and a metallo-organic...
Multiple-depth STI trenches in integrated circuit fabrication
Multiple trench depths within an integrated circuit device are formed by first forming trenches in a substrate to a first depth, but of varying widths. Formation...
Methods for packaging and encapsulating semiconductor device assemblies
that include tape substrates
Packaging and encapsulation methods include use of a tape substrate with a mold gate that includes an aperture and a support element that extends over at least a...
Method of forming a PCRAM device incorporating a resistance-variable
A method of forming a memory device, such as a PCRAM, including selecting a chalcogenide glass backbone material for a resistance variable memory function and...
Chemical vapor deposition apparatus and methods
This invention includes chemical vapor deposition apparatus, methods of chemical vapor depositing an amorphous carbon comprising layer on a substrate, and...
Method of forming a monolithic base plate for a field emission display
A substrate is provided and is configurable into a base plate for a field emission display. A plurality of discrete, segmented regions of field emitter tips are...
System and method for testing a memory for a memory failure exhibited by a
A system and method for testing a memory under test on automated test equipment (ATE) that includes capturing operating conditions for a memory exhibiting a...
Memory hub and method for memory sequencing
A memory module includes a memory hub coupled to several memory devices. The memory hub includes at least one performance counter that tracks one or more system...
System and method for re-routing signals between memory system components
A plurality of memory modules used in a computer system each include a memory hub that is connected to a plurality of memory devices. The memory modules are...
Method and system for providing access to computer resources
A method and computer system for providing access to computer resources on a computer system and includes generating a token containing encrypted user...
System and method for shape reconstruction from optical images
Reconstructing the shape of the surface of an object in greater than two dimensions is performed using a noise-tolerant reconstruction process and/or a...
High speed array pipeline architecture
A memory device including a memory array having a plurality of memory cells, and a plurality of peripheral devices for reading data out of and writing data into...
Regulating voltages for refresh operation using flash trim bits in
semiconductor memory devices
A method and apparatus for regulating voltages in semiconductor devices. Trim bits are stored in a trim flash array, where the trim bits define a voltage value...