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| Patent # | Description |
|---|---|
| US-7,318,204 |
Synthesizing semiconductor process flow models Systems and methods of modeling a best-guess semiconductor process flow for fabricating a desired semiconductor device are provided. The best-guess process flow... |
| US-7,318,181 |
ROM-based controller monitor in a memory device A circuit to monitor the activity of a memory device during program/erase operations that are managed by a ROM-based microcontroller. Different signals can be... |
| US-7,318,167 |
DDR II write data capture calibration A calibration circuit for calibrating the input data path of a digital circuit is disclosed. A simple string of a repeating data pattern such as, e.g., "1100,"... |
| US-7,318,146 |
Peripheral device with hardware linked list A linked list is implemented in hardware. Various registers within the linked list are writeable until a control register is written, rendering the registers... |
| US-7,317,647 |
Noise suppression in memory device sensing NAND memory devices utilize sensing devices for sensing a programmed state of a nonvolatile memory cell or writing a data value to a nonvolatile memory cell.... |
| US-7,317,635 |
User configurable commands for flash memory A memory device includes a plurality of memory dies, each having an assigned address. A register on each die is reset on power-up. Boot data is loaded as part of... |
| US-7,317,579 |
Method and apparatus providing graded-index microlenses Microlenses are fabricated with a refractive-index gradient. The refractive-index gradient is produced in a microlens material such that the refractive index is... |
| US-7,317,567 |
Method and apparatus for providing color changing thin film material An electrochromic device and methods for forming the same are provided. The device includes first and second electrodes. A layer of ... |
| US-7,317,521 |
Particle detection method A method for detecting on a substrate used in the fabrication of integrated devices comprises the steps of (1) contacting the substrate with a monomer, wherein... |
| US-7,317,480 |
Imaging apparatus providing black level compensation of a successive
approximation A/D converter Image sensor with a successive approximation A/D converter that automatically compensates for black level and provides a signal indicative of the difference... |
| US-7,317,446 |
Method for entering data into a computer using a peripheral input device
having a retractable cord The invention, in one embodiment, is a method for entering data into a computer. The method includes anchoring an electrical cord connecting a peripheral input... |
| US-7,317,322 |
Interconnect for bumped semiconductor components An interconnect for testing semiconductor components includes a substrate, and contacts on the substrate for making temporary electrical connections with bumped... |
| US-7,317,220 |
Even nucleation between silicon and oxide surfaces for thin silicon
nitride film growth A semiconductor assembly providing even nucleation between silicon and oxide surfaces for growing uniformly thin silicon nitride layers used in semiconductor... |
| US-7,317,200 |
SnSe-based limited reprogrammable cell Methods and apparatus for providing a memory device that can be programmed a limited number of times. According to exemplary embodiments, a memory device and its... |
| US-7,316,981 |
Method of removing silicon from a substrate A wet etching method of removing silicon from a substrate includes depositing a layer comprising silicon in elemental form over a substrate. The layer is exposed... |
| US-7,316,063 |
Methods of fabricating substrates including at least one conductive via A method of fabricating a substrate is disclosed. Apertures are formed in a substrate blank. A conductive layer is formed on opposing surfaces of the substrate,... |
| US-7,315,522 |
Communication methods using slotted replies An RFID tag population is selected by an interrogator. Each tag of the selected tag population then responds to the interrogator in accordance with a slotted... |
| US-7,315,476 |
System and method for communicating information to a memory device using a
reconfigured device pin System and method for communicating information to and from memory devices. In one embodiment, the invention includes a memory system having a memory device... |
| US-7,315,179 |
System for isolating a short-circuited integrated circuit (IC) from other
ICs on a semiconductor wafer A circuit for isolating a short-circuited integrated circuit (IC) formed on the surface of a semiconductor wafer from other ICs formed on the wafer that are... |
| US-7,315,082 |
Semiconductor device having integrated circuit contact A process for forming vertical contacts in the manufacture of integrated circuits, and devices so manufactured, is disclosed. The process eliminates the need for... |
| US-7,315,074 |
Use of DAR coating to modulate the efficiency of laser fuse blows The present invention relates to a laser fuse. The laser fuse comprises an element comprising a heat conductive material. The fuse also includes an absorption... |
| US-7,315,014 |
Image sensors with optical trench A device and method for providing an optical trench structure for a pixel which guides incoming light onto the photosensor of the pixel. The optical trench... |
| US-7,314,837 |
Chemical treatment of semiconductor substrates A method is disclosed for removing liquids from a semiconductor substrate by contacting the liquid on the substrate with a liquid which attracts the liquid on... |
| US-7,314,822 |
Method of fabricating stacked local interconnect structure A method is provided for forming stacked local interconnects that do not extend into higher levels within a multilevel IC device, thereby economizing space... |
| US-7,314,821 |
Method for fabricating a semiconductor interconnect having conductive
spring contacts An interconnect for testing a semiconductor component includes a substrate, and interconnect contacts on the substrate configured to electrically engage... |
| US-7,314,812 |
Method for reducing the effective thickness of gate oxides by nitrogen
implantation and anneal A method for reducing the effective thickness of a gate oxide using nitrogen implantation and anneal subsequent to dopant implantation and activation is... |
| US-7,314,401 |
Methods and systems for conditioning planarizing pads used in planarizing
substrates Monitoring the process of planarizing a workpiece, e.g., conditioning a CMP pad, can present some difficulties. Aspects of this invention provide methods and... |
| US-7,313,826 |
Connected support entitlement system method of operation An entitlement system and method for computers allowing controlled access to operating systems, software applications, data, or hardware for a computer system.... |
| US-7,313,644 |
Memory device interface An interface device provided on a motherboard, or with a memory control chip set, translates between a controller, intended to communicate with a packet based... |
| US-7,313,273 |
Automatic color constancy for image sensors An electronic imaging system operates as closely as possible to the cone spectral response space to obtain a human eye-like long, medium, short (LMS) wavelength... |
| US-7,313,034 |
Low supply voltage temperature compensated reference voltage generator and
method A reference voltage generator uses a conventional forward junction voltage generating device and a conventional thermal generator to generate a thermal voltage.... |
| US-7,312,857 |
Method and system for monitoring plasma using optical emission
spectrometry A method and system are presented for monitoring the optical emissions associated with a plasma used in integrated circuit fabrication. The optical emissions may... |
| US-7,312,626 |
CMOS circuits with reduced crowbar current Various circuit embodiments comprise an input node to receive an input signal for a CMOS transistor stack, a first output node to deliver the input signal to a... |
| US-7,312,516 |
Chip scale package with heat spreader A dense semiconductor flip-chip device assembly is provided with a heat sink/spreading/dissipating member that is formed as a paddle of a metallic paddle frame... |
| US-7,312,494 |
Lanthanide oxide / hafnium oxide dielectric layers Dielectric layers containing a hafnium oxide hafnium oxide layer arranged as one or more monolayers and a lanthanide oxide layer and a method of fabricating such... |
| US-7,312,431 |
CMOS imaging for ALC and CDS Embodiments of the invention provide pixel cells that allow both automatic light control and correlated double sampling operations. The pixel cell includes first... |
| US-7,312,164 |
Selective passivation of exposed silicon A method for applying a passivation layer selectively on an exposed silicon surface includes use of a liquid phase solution supersaturated in silicon dioxide.... |
| US-7,312,163 |
Atomic layer deposition methods, and methods of forming materials over
semiconductor substrates The invention includes methods in which at least two different precursors are flowed into a reaction chamber at different and substantially non-overlapping times... |
| US-7,312,159 |
Compositions for dissolution of low-k dielectric films, and methods of use An improved composition and method for cleaning the surface of a semiconductor wafer are provided. The composition can be used to selectively remove a low-k... |
| US-7,312,120 |
Method for obtaining extreme selectivity of metal nitrides and metal
oxides Methods for etching metal nitrides and metal oxides include using ultradilute HF solutions and buffered, low-pH HF solutions containing a minimal amount of the... |
| US-7,312,101 |
Packaged microelectronic devices and methods for packaging microelectronic
devices Packaged microelectronic devices and methods for packaging microelectronic devices are disclosed herein. In one embodiment, a method of packaging a ... |
| US-7,311,947 |
Laser assisted material deposition A method of forming a film on a substrate includes activating a gas precursor to form a material on the substrate by irradiating the gas precursor with... |
| US-7,311,942 |
Method for binding halide-based contaminants during formation of a
titanium-based film A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized... |
| US-7,310,752 |
System and method for on-board timing margin testing of memory modules A memory module includes several memory devices coupled to a memory hub. The memory hub includes several link interfaces coupled to respective processors,... |
| US-7,310,748 |
Memory hub tester interface and method for use thereof A memory hub including a memory test bridge circuit for testing memory devices. Test command packets are coupled from a tester to the memory hub responsive to a... |
| US-7,310,276 |
Memory device and method having data path with multiple prefetch I/O
configurations A memory device is operable in either a high mode or a low speed mode. In either mode 32 bits of data from each of two memory arrays are prefetched into... |
| US-7,310,259 |
Access circuit and method for allowing external test voltage to be applied
to isolated wells An access circuit selectively couples an externally accessible terminal to each of a plurality of isolated DRAM wells in which respective DRAM arrays are... |
| US-7,310,257 |
Local digit line architecture and method for memory devices having
multi-bit or low capacitance memory cells A DRAM array includes for each column a pair of complimentary digit lines that are coupled to a sense amplifier. Each of the global digit lines is selectively... |
| US-7,310,252 |
Closed-loop high voltage booster A voltage boosting circuit with a closed-loop control mechanism and a controllable slew rate. A tracking capacitor and a control current form the closed-loop and... |
| US-7,310,018 |
Method and apparatus providing input buffer design using common-mode
feedback An input buffer includes a first stage for receiving an input signal and having a first pair of complementary output signals, the first stage including an input... |
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