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Memory utilizing oxide nanolaminates
Structures, systems and methods for transistors utilizing oxide nanolaminates are provided. One transistor embodiment includes a first source/drain region, a...
Wireless communication devices, radio frequency identification devices,
methods of forming a wireless...
Cards communication devices, and methods of forming the same and encoding visibly perceptible information on communication devices are provided. A remote...
Fast-locking digital phase locked loop
A method and apparatus for synchronizing signals. For devices, such as memory devices, implementing a synchronization device to synchronize signals, a...
Wafer level semiconductor component having thinned, encapsulated dice and
A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps...
Semiconductor package assembly and method for electrically isolating
A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package...
Computer systems containing resistors which include doped
The invention includes semiconductor constructions having a thin film stacked resistor in electrical connection with a source/drain region of a transistor...
Method to construct a self aligned recess gate for DRAM access devices
Self-aligned recessed gate structures and method of formation are disclosed. Field oxide area for isolation are first formed in a semiconductor substrate. A...
NROM flash memory with a high-permittivity gate dielectric
A high permittivity gate dielectric is used in an NROM memory cell. The gate dielectric has a dielectric constant greater than silicon dioxide and is comprised...
Memory utilizing oxide-conductor nanolaminates
Structures, systems and methods for floating gate transistors utilizing oxide-conductor nanolaminates are provided. One floating gate transistor embodiment...
Amorphous carbon-based non-volatile memory
A resistance variable memory element and a method for forming the same. The memory element has an amorphous carbon layer between first and second electrodes. A...
Transparent amorphous carbon structure in semiconductor devices
A transparent amorphous carbon layer is formed. The transparent amorphous carbon layer has a low absorption coefficient such that the amorphous carbon is...
Method of producing rough polysilicon by the use of pulsed plasma chemical
vapor deposition and products...
A method for depositing a rough polysilicon film on a substrate is disclosed. The method includes introducing the reactant gases argon and silane into a...
H.sub.2 plasma treatment
Electronic devices are constructed by a method that includes forming a first conductive layer in an opening in a multilayer dielectric structure supported by a...
Conductive connection forming methods, oxidation reducing methods, and
integrated circuits formed thereby
A conductive connection forming method includes forming a first layer comprising a first metal on a substrate and forming a second layer comprising a second...
Strained semiconductor by wafer bonding with misorientation
One aspect of the present invention relates to a method for forming a strained semiconductor structure. In various embodiments, at least two strong bonding...
NROM memory cell, memory array, related devices and methods
An array of memory cells configured to store at least one bit per one F.sup.2 includes substantially vertical structures providing an electronic memory function...
Methods for epoxy loc die attachment
A plurality of lead frames is supplied in a lead frame-by-lead frame sequence. A curable adhesive, preferably a 505 Epoxy, is applied to one surface of each lead...
Alternative method used to package multimedia card by transfer molding
A semiconductor card is made by a disclosed method which, in one molding step, forms a plastic body on a substrate attached to a surrounding frame by narrow...
Methods for treating semiconductor substrates
The invention includes a method for treating a plurality of discrete semiconductor substrates. The discrete semiconductor substrates are placed within a reactor...
Methods and apparatus for electromechanically and/or
electrochemically-mechanically removing conductive...
Methods and apparatuses for electromechanically and/or electrochemically-mechanically removing conductive material from a microelectronic substrate. An apparatus...
Method to prevent damage to probe card
Probe cards are configured with protective circuitry suitable for use in electrical testing of semiconductor dice without damage to the probe cards. Protective...
Testing CMOS CAM with redundancy
A method for testing an CMOS ternary content addressable memory (TCAM) device includes a match line test to identify stuck match lines, a pull down test to...
Circuit and method for operating a delay-lock loop in a power saving
A control circuit for a delay-lock loop having a delay line and a phase detector is used in a memory device. In a standby mode, the control circuit isolates a...
Apparatus and method for semiconductor device repair with reduced number
of programmable elements
An apparatus and method using a reduced number of nonvolatile programming elements for enabling redundant memory blocks in a semiconductor memory is disclosed. A...
Multiple level cell memory device with single bit per cell, re-mappable
A non-volatile memory device has a plurality of memory cells that are organized into memory blocks. Each block can operate in either a multiple level cell mode...
ROM embedded DRAM with anti-fuse programming
A ROM embedded DRAM provides ROM cells that can be electrically programmed to a data state using DRAM capacitor memory cells. Numerous techniques for reading the...
Controlling lens shape in a microlens array
A semi-conductor based imager includes a microlens array having microlenses with modified focal characteristics. The microlenses are made of a microlens...
Self-timed fine tuning control
A device and system having improved timing control of input signals. Specifically, a fine delay block is provided having feedback loops therein such that the...
Bottom side stiffener probe card
A probe card for production testing of semiconductor imaging die includes a stiffener supported on a bottom side of the probe card. The top of the stiffener is...
Methods for wafer-level packaging of microelectronic devices and
microelectronic devices formed by such methods
Methods for packaging microelectronic devices, microelectronic workpieces having packaged dies, and microelectronic devices. One aspect of the invention is...
Reduced footprint packaged microelectronic components and methods for
manufacturing such microelectronic components
The present disclosure describes microfeature workpieces, microelectronic component packages, and methods of forming microelectronic components and ...
Output prediction logic circuits with ultra-thin vertical transistors and
methods of formation
Very fast integrated OPL circuits, such as pseudo-NMOS OPL and dynamic OPL, comprising CMOS gate arrays having ultra-thin vertical NMOS transistors are...
Devices containing platinum-iridium films and methods of preparing such
films and devices
Methods for forming platinum-iridium films, particularly in the manufacture of a semiconductor device, and devices (e.g., capacitors, integrated circuit devices,...
Method and system for wavelength-dependent imaging and detection using a
An object to be imaged or detected is illuminated by a single broadband light source or multiple light sources emitting light at different wavelengths. The light...
Small grain size, conformal aluminum interconnects and method for their
A first layer of titanium nitride (TiN) is formed on a semiconductor structure, such as an interconnect via. Then, a second layer of TiN is formed on the first...
Methods of forming integrated circuitry
The invention includes methods of forming integrated circuitry. In one implementation, a method of forming an integrated circuit includes forming a plurality of...
Methods of forming hafnium oxide
The invention includes methods of forming hafnium-containing materials, such as, for example, hafnium oxide. In one aspect, a semiconductor substrate is...
Methods of forming a capacitor
A method of forming a capacitor having a capacitor dielectric layer comprising ABO.sub.3, where "A" is selected from the group consisting of Group IIA and Group...
Capacitor fabrication methods including forming a conductive layer
A capacitor fabrication method may include atomic layer depositing a conductive barrier layer to oxygen diffusion over the first electrode. A method may instead...
Methods to form electronic devices and methods to form a material over a
A first electrode and a doped oxide layer laterally proximate thereof are provided over a substrate. A silicon nitride layer is formed over both the doped oxide...
Method of forming vertical sub-micron CMOS transistors on (110), (111),
(311), (511), and higher order surfaces...
A method for forming NMOS and PMOS transistors that includes cutting a substrate along a higher order orientation and fabricating deep sub-micron NMOS and PMOS...
Die stacking scheme
An improved semiconductor die stacking scheme is provided. In accordance with one embodiment of the present invention, a method of stacking a plurality of...
Stacked die module and techniques for forming a stacked die module
A technique for forming die stacks. Specifically, a stacking tip is provided to facilitate the stacking of die in a desired configuration. A first die is picked...
Deep photodiode isolation process
A barrier implanted region of a first conductivity type located below an isolation region of a pixel sensor cell and spaced from a doped region of a second...
Method of forming a non-continuous conductive layer for laminated
A method of fabricating a circuit board is provided that includes forming a first layer of conductive material over an insulating layer, removing portions of the...
Memory hub and method for memory system performance monitoring
A memory module includes a memory hub coupled to several memory devices. The memory hub includes at least one performance counter that tracks one or more system...
Machine vision systems for use with programmable material consolidation
system and associated methods and...
Programmable material consolidation systems employing a machine vision system in combination with a 3-D printing system for accurately locating a position over a...
Resistive heater for thermo optic device
Resistive heaters formed in two mask counts on a surface of a grating of a thermo optic device thereby eliminating one mask count from prior art manufacturing...
Apparatus and method for repairing a semiconductor memory
An apparatus and method for repairing a semiconductor memory device includes a first memory cell array, a first redundant cell array and a repair circuit...
Method and apparatus for synchronizing data from memory arrays
According to one embodiment, a combination is comprised of a plurality of sense amps, each having an input for receiving a clock signal. A data bus is for...