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Reconstructed semiconductor wafers including alignment droplets contacting
Apparatus, systems and methods relating to the reconstruction of semiconductor wafers for wafer-level processing are disclosed. Selected semiconductor dice...
Semiconductor devices with oxide coatings selectively positioned over
exposed features including semiconductor...
A semiconductor device structure includes a passivation layer through which only non-silicon-comprising structures are exposed. The semiconductor device...
Resistance variable memory device and method of fabrication
Methods and apparatus for providing a resistance variable memory device with agglomeration prevention and thermal stability. According to one embodiment, a...
Techniques to create low K ILD for beol
One aspect of the present subject matter relates to a method for forming an interlayer dielectric (ILD). In various embodiments of the method, an insulator layer...
Well for CMOS imager
A well region of a first conductivity type located in a substrate of the first conductivity type and below about half the channel length of an electrically...
Microelectronic imagers with shaped image sensors and methods for
manufacturing microelectronic imagers
Microelectronic imagers with shaped image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device...
The invention includes semiconductor constructions having a thin film stacked resistor in electrical connection with a source/drain region of a transistor...
Non-planar flash memory having shielding between floating gates
A first plurality of memory cells is formed on pillars in a first column of the array. A second plurality of memory cells is formed in a first set of trenches in...
Microelectronic imagers with optical devices and methods of manufacturing
such microelectronic imagers
Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes...
Methods of forming semiconductor constructions
The invention includes methods of forming and/or passivating semiconductor constructions. In particular aspects, various oxides of a semiconductor substrate can...
Methods of fabricating interconnects including depositing a first material
in the interconnect with a thickness...
In one aspect, the invention encompasses a method of fabricating an interconnect for a semiconductor component. A semiconductor substrate is provided, and an...
Edge intensive antifuse
An antifuse including a bottom plate having a plurality of longitudinal members arranged substantially parallel to a first axis, a dielectric layer formed on the...
Electroless plating of metal caps for chalcogenide-based memory devices
A method of forming a metal cap over a conductive interconnect in a chalcogenide-based memory device is provided and includes, forming a layer of a first...
Semiconductor processing method and field effect transistor
A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A...
Metal plating using seed film
A seed film and methods incorporating the seed film in semiconductor applications is provided. The seed film includes one or more noble metal layers, where each...
Formation of standard voltage threshold and low voltage threshold MOSFET
Wells are formed in a substrate where standard Vt and low Vt devices of both a first and second type are to be fabricated. Wells defining the locations of first...
Method of forming fully-depleted (FD) SOI MOSFET access transistor
A fully-depleted (FD) Silicon-on-Insulator (SOI) MOSFET access transistor comprising a gate electrode of a conductivity type which is opposite the conductivity...
Method and apparatus for reducing substrate bias voltage drop
A semiconductor device is provided with a conductive layer provided on a backside of a semiconductor substrate. The conductive layer helps maintain a uniform...
Methods for fabricating stiffeners for flexible substrates
Methods for fabricating stiffeners for flexible substrates, including, but not limited to, tapes, films, or other connective structures, which are configured to...
Elimination of RDL using tape base flip chip on flex for die stacking
A flexible film interposer for stacking a flip chip semiconductor die onto a second (bottom) semiconductor die, semiconductor devices and stacked die assemblies...
Method for production of MRAM elements
Magneto-resistive random access memory elements include a ferromagnetic layer having uniaxial anisotropy provided by elongate structures formed in the...
End effectors and methods for manufacturing end effectors with contact
elements to condition polishing pads...
End effectors, apparatuses including end effectors for conditioning planarizing pads, and methods for manufacturing end effectors with contact elements to...
Semiconductor manufacturing system for forming metallization layer
A method for forming a metallization layer. A first layer is formed outwardly from a semiconductor substrate. Contact vias are formed through the first layer to...
Gas-assist systems for applying and moving ozonated resist stripper to
resist-bearing surfaces of substrates
A method for moving resist stripper across the surface of a semiconductor substrate that includes applying a wet chemical resist stripper, such as an organic or...
Atomic layer deposition using electron bombardment
Formation of a layer of material on a surface by atomic layer deposition methods and systems includes using electron bombardment of the chemisorbed precursor.
Retaining rings, planarizing apparatuses including retaining rings, and
methods for planarizing micro-device...
Retaining rings, planarizing apparatuses including retaining rings, and methods for mechanical and/or chemical-mechanical planarization of micro-device...
Buffer control system and method for a memory system having outstanding
read and write request buffers
A memory controller and method for managing the issuance of read and write requests to a system memory is provided. The number of outstanding read requests and...
Embedded DRAM cache memory and method having reduced latency
A computer system includes a processor, a system memory, and an integrated circuit system controller coupled to the processor and the system memory. The system...
Internal bias measure with onboard ADC for electronic devices
An apparatus and method for on-chip bias measurement of an analog signals on an integrated circuit with a switchable analog-to-digital converter capable of...
Memory system and method for strobing data, command and address signals
A memory system couples command, address or write data signals from a memory controller to a memory device and read data signals from the memory device to the...
Active termination circuit and method for controlling the impedance of
external integrated circuit terminals
An active termination circuit is used to set the input impedance of a plurality of input terminals. Each of the input terminals is coupled to a supply voltage...
Programmable memory address and decode circuits with low tunnel barrier
Structures and methods for programmable memory address and decode circuits with low tunnel barrier interpoly insulators are provided. The decoder for a memory...
High speed data bus
The invention comprises data processing systems and components thereof. Such systems may include a memory controller, a plurality of memory devices, a data bus...
Power-on-reset circuit based on the threshold levels and quadratic I-V
behavior of MOS transistors
A system and method for providing a clock-independent reset signal based on supply voltage threshold levels is described. The trip points or predefined voltage...
Contact pad arrangement on a die
An integrated device includes a redundant bond pad for accessing internal circuitry in the event that the main bond pad for that circuitry is difficult to access...
Data download to imager chip using image sensor as a receptor
An imaging device having a CMOS photosensor array for capturing images is described in which the array is also used to input programming and/or data used to...
Method and structure for reducing resistance of a semiconductor device
A method used to form a semiconductor device comprises forming a polysilicon layer, forming a conductive barrier layer on the polysilicon layer, then forming a...
Reduced barrier photodiode/transfer gate device structure of high
efficiency charge transfer and reduced lag...
A pixel cell having a reduced potential barrier near a region where a gate and a photodiode are in close proximity to one another, and a method for forming the...
Dark current reduction circuitry for CMOS active pixel sensors
A row driver circuit is disclosed for supplying a reset voltage to a plurality of reset transistors of an active pixel sensor array while minimizing gate induced...
Methods and structures for metal interconnections in integrated circuits
A typical integrated-circuit fabrication requires interconnecting millions of microscopic transistors and resistors with metal wires. Making the metal wires...
Barrier-metal-free copper damascene technology using atomic hydrogen
A method for forming conductive contacts and interconnects in a semiconductor structure, and the resulting conductive components are provided. In particular, the...
Low temperature nitride used as Cu barrier layer
A method of depositing a non-conductive barrier layer onto a metal surface wherein the resistance of the metal remains substantially unchanged before and after...
Passivation processes for use with metallization techniques
A method for passivating a substrate, such as a semiconductor substrate, that is to be "metallized," or on which a metal film or structure is to be formed,...
Nickel bonding cap over copper metalized bondpads
A method for forming a nickel cap layer over copper metalized bond pad is disclosed in which the phosphorous content of the nickel cap, and particularly the...
Masked nitrogen enhanced gate oxide
A method for fabricating improved integrated circuit devices. The method enables selective hardening of gate oxide layers and includes providing a semiconductor...
Method for fabricating semiconductor components using mold cavities having
runners configured to minimize venting
A system for fabricating semiconductor components includes mating mold cavity plates having mold cavities configured to mold body segments of the semiconductor...
Stacked die module and techniques for forming a stacked die module
Embodiments of the present technique relate to forming die stacks. Specifically, embodiments of the present technique include a method of forming and testing...
Method to pattern a substrate
An aspect of the present invention includes a method of lithography to enhance uniformity of critical dimensions of features patterned onto a workpiece. Said...
Method for adjusting dimensions of photomask features
A method for adjusting one or more dimensions of a photomask subsequent to etching of a defective pattern in the chrome-containing layer thereof is provided. The...
Chemical mechanical polishing apparatus and methods for chemical
The present invention provides a deformable pad useful for chemical mechanical polishing ("CMP"), a CMP apparatus incorporating the deformable pad of the present...