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Patent # Description
US-7,111,185 Synchronization device with delay line control circuit to control amount of delay added to input signal and...
A method and apparatus for synchronizing signals. For memory devices, such as SDRAMs, implementing a synchronization device to synchronize one signal, such as an...
US-7,110,854 Numerical control apparatus for machine tool and numerical control method for machine tool
A numerical control apparatus for machine tool, including: an NC program storage portion; an electronic cam data transformation unit which transforms an NC...
US-7,110,598 Automatic color constancy for image sensors
An electronic imaging system operates as closely as possible to the cone spectral response space to obtain a human eye-like long, medium, short (LMS) wavelength...
US-7,110,319 Memory devices having reduced coupling noise between wordlines
Memory devices configured to reduce coupling noise between adjacent wordlines in a memory array. More specifically, wordline drivers are interleaved such that...
US-7,110,299 Transistor with nanocrystalline silicon gate structure
A memory is described which has memory cells that store data using hot electron injection. The data is erased through electron tunneling. The memory cells are...
US-7,110,159 Method and apparatus for patterning a workpiece and methods of manufacturing the same
An apparatus for patterning a work piece including a source, and at least one reflective tilting surface adapted to induce a phase difference using at least one...
US-7,110,060 Assemblies and methods for illuminating a display
A computer display is disclosed. The computer display includes a LCD housing, a light source coupled to the LCD housing, and a LCD coupled to the LCD housing....
US-7,109,807 Phase detector for reducing noise
The present invention provides a method and an apparatus for reducing noise. The apparatus includes a phase detector adapted to determine a phase difference...
US-7,109,588 Method and apparatus for attaching microelectronic substrates and support members
A microelectronic package and method for forming such packages. In one embodiment, the package can be formed by providing a support member having a first...
US-7,109,576 Semiconductor component having encapsulated die stack
A semiconductor component includes a substrate and multiple stacked, encapsulated semiconductor dice on the substrate. A first die is back bonded to the...
US-7,109,572 Quad flat no lead (QFN) grid array package
A quad flat no-lead (QFN) grid array semiconductor package and method for making the same is disclosed. The package includes a semiconductor die and a lead frame...
US-7,109,563 Films deposited at glancing incidence for multilevel metallization
Systems, devices and methods are provided to improve performance of integrated circuits by providing a low-k insulator. One aspect is an integrated circuit...
US-7,109,548 Operating a memory device
A floating gate transistor has a reduced barrier energy at an interface with an adjacent gate insulator, allowing faster charge transfer across the gate...
US-7,109,545 Integrated circuit memory with offset capacitor
A capacitor for use in integrated circuits comprises a layer of conductive material. The layer of conductive material including at least a first portion and a...
US-7,109,542 Capacitor constructions having a conductive layer
A capacitor fabrication method may include atomic layer depositing a conductive barrier layer to oxygen diffusion over the first electrode. A method may instead...
US-7,109,510 Method and apparatus for aligning a substrate on a stage
A method for aligning a workpiece may include determining a first and second position of a first edge of the workpiece based on a first and a second position of...
US-7,109,115 Methods of providing ohmic contact
Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material...
US-7,109,113 Solid source precursor delivery system
A solid source precursor material is delivered to a deposition chamber in vaporized form by utilizing a solid source precursor delivery system having either...
US-7,109,112 Method of providing a structure using self-aligned features
In a copper plating process, a seed layer is uniformly deposited over a surface, including lining a high aspect ratio trench defined by that surface. A mask...
US-7,109,106 Methods for providing support for conductive structures protruding from semiconductor device components
Methods of fabricating and disposing supports around contact pads of semiconductor device components and other substrates include use of stereolithographic...
US-7,109,105 Methods of making semiconductor fuses
Fuses for integrated circuits and semiconductor devices and methods for using the same. The semiconductor fuse contains two conductive layers, an overlying and...
US-7,109,089 Semiconductor fabrication using a collar
In one embodiment, a method includes selectively depositing a collar material between a number of memory containers. The collar material along a side of a first...
US-7,109,068 Through-substrate interconnect fabrication methods
A method for forming a conductive via or through-wafer interconnect (TWI) in a semiconductive substrate for use as a contact card, test connector, semiconductor...
US-7,109,063 Semiconductor substrate for build-up packages
The present invention provides techniques to fabricate build-up single or multichip modules. In one embodiment, this is accomplished by dispensing die-attach...
US-7,109,059 Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
An inventive electronic device, such as a multi-chip module (MCM), a Single In-line Memory Module (SIMM), or a Dual In-line Memory Module (DIMM), includes a...
US-7,109,056 Electro-and electroless plating of metal in the manufacture of PCRAM devices
Non-volatile, resistance variable memory devices, integrated circuit elements, and methods of forming such devices are provided. According to one embodiment of a...
US-7,107,675 Methods for retaining an electrical connector in a receptacle on an electrical component in a computer
Methods for preventing disengagement of electrical connectors in computers are disclosed herein. A method in accordance with one embodiment of the invention...
US-7,107,671 Method of processing a strip of lead frames
A method of processing a strip of lead frames is disclosed. The method includes engaging the strip with a lead frame advancement system, advancing the strip to a...
US-7,107,572 Methods of forming patterned reticles
The invention includes methods of forming patterned reticles. Design features can be introduced into a layout for a reticle prior to optical proximity...
US-7,107,554 Line width check in layout database
A machine-readable medium has a set of machine-readable instructions for causing a computer to perform a method. The method includes checking a layout having a...
US-7,107,415 Posted write buffers and methods of posting write requests in memory modules
A memory module includes a memory hub coupled to several memory devices. The memory hub includes a posted write buffer that stores write requests so that...
US-7,107,412 Distributed processor memory module and method
A memory module for a computer system is removably coupled to a computer system mother-board having a data bus and an address bus. The memory module includes a...
US-7,107,392 Content addressable memory (CAM) device employing a recirculating shift register for data storage
A content addressable memory (CAM) device is described including a plurality of storage locations, each arranged as a recirculating shift register, and plurality...
US-7,107,391 Automatic learning in a CAM
A CAM array which enables a learning process to be an extension of a search process is disclosed. When a search fails to find a matching data in the CAM array,...
US-7,107,390 Parity-scanning and refresh in dynamic memory devices
A method and apparatus that coordinates refresh and parity-scanning in DRAM-based devices such that parity-scan operations substitute for refresh operations when...
US-7,107,117 Sorting a group of integrated circuit devices for those devices requiring special testing
A method for sorting integrated circuit (IC) devices of the type having a fuse identification (ID) into those devices requiring enhanced reliability testing and...
US-7,107,019 Methods of operating microelectronic devices, and methods of providing microelectronic devices
Microelectronic devices, methods of operating microelectronic devices, and methods of providing microelectronic devices are described. In one embodiment, a...
US-7,106,655 Multi-phase clock signal generator and method having inherently unlimited frequency capability
A delay-lock loop includes several delay lines, all but the first of which is composed of at least one variable delay unit that provides a fixed delay and a...
US-7,106,646 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation
A method and apparatus is provided for idling a clock synchronizing circuit during at least a portion of time during execution of a refresh operation in a memory...
US-7,106,638 Active termination circuit and method for controlling the impedance of external integrated circuit terminals
An active termination circuit is used to set the input impedance of a plurality of input terminals. Each of the input terminals is coupled to a supply voltage...
US-7,106,637 Asynchronous interface circuit and method for a pseudo-static memory device
An asynchronous address interface circuit and method for converting unrestricted randomly scheduled address transitions of memory address signals into scheduled...
US-7,106,611 Wavelength division multiplexed memory module, memory system and method
A computer system includes a controller linked to a plurality of memory modules each of which has an optical memory hub and several memory devices coupled to the...
US-7,106,490 Methods and systems for improved boundary contrast
The present invention relates to methods and systems that define feature boundaries in a radiation sensitive medium on a workpiece using a diffraction-type...
US-7,106,367 Integrated CMOS imager and microcontroller
A method and apparatus providing a CMOS imager with an integrated controller on a common integrated circuit substrate. Also integrated on the common substrate...
US-7,106,201 Communication devices, remote intelligent communication devices, electronic communication devices, methods of...
The present invention provides electronic communication devices, methods of forming electrical communication devices, and communications methods. An electronic...
US-7,105,997 Field emitter devices with emitters having implanted layer
Structures and methods to ease electron emission and limit outgassing so as to inhibit degradation to the electron beam of a field emitter device are described....
US-7,105,992 Field emission device having insulated column lines and method of manufacture
An FED and a method of manufacture are provided. The FED includes a cathode assembly containing an improved column line structure. The column line structure...
US-7,105,930 Semiconductor substrates including I/O redistribution using wire bonds and anisotropically conductive film,...
Methods and apparatus for eliminating wire sweep and shorting while avoiding the use of under-bump metallization and high cost attendant to the use of...
US-7,105,921 Semiconductor assemblies having electrophoretically insulated vias
Methods are provided for creating lined vias in semiconductor substrates. Using electrophoretic deposition techniques, micelles of a lining material are...
US-7,105,918 Interposer with flexible solder pad elements and methods of manufacturing the same
Various embodiments of an interposer for mounting a semiconductor die, as well as methods for forming the interposer, are disclosed. The interposer includes...
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