Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: micron





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-7,064,476 Emitter
Electron emitters and a method of fabricating emitters are disclosed, having a concentration gradient of impurities, such that the highest concentration of...
US-7,064,447 Bond pad structure comprising multiple bond pads with metal overlap
A bond pad structure comprising two bond pads, methods of forming the bond pad structure, an integrated circuit die incorporating the bond pad structure, and...
US-7,064,438 Low-loss coplanar waveguides
Coplanar waveguides having a deep trench between a signal line and a ground plane and methods of their fabrication are disclosed. An oxide layer is provided over...
US-7,064,406 Supression of dark current in a photosensor for imaging
A pixel cell having a halogen-rich region localized between an oxide isolation region and a photosensor. The halogen-rich region prevents leakage from the...
US-7,064,390 Metal gate engineering for surface p-channel devices
A semiconductor device, such as a CMOS device, having gates with a high work function in PMOS regions and low work functions in NMOS regions and a method of...
US-7,064,080 Semiconductor processing method using photoresist and an antireflective coating
A semiconductor processing method includes forming an antireflective coating comprising Ge and Se over a substrate to be patterned. Photoresist is formed over...
US-7,064,069 Substrate thinning including planarization
A method and intermediate structure for improving the thinning and planarity of a wafer back side utilizing planarization material applied to the back side prior...
US-7,064,058 Low-temperature growth high-quality ultra-thin praseodymium gate dieletrics
A praseodymium (Pr) gate oxide and method of fabricating same that produces a high-quality and ultra-thin equivalent oxide thickness as compared to conventional...
US-7,064,052 Method of processing a transistor gate dielectric film with stem
A method of fabricating a semiconductor device includes depositing a dielectric film and subjecting the dielectric film to a wet oxidation in a rapid thermal...
US-7,064,036 Dual-gate transistor device and method of forming a dual-gate transistor device
Embodiments in accordance with the present invention provide methods of forming a dual gated semiconductor-on-insulator (SOI) device. Such methods encompass...
US-7,064,010 Methods of coating and singulating wafers
Separating and coating semiconductor dice at the wafer level to form individual chip-scale packages. In one embodiment, channels are formed in the active surface...
US-7,064,007 Method of using foamed insulators in three dimensional multichip structures
A multichip cube structure having a foamed insulating material disposed between adjacent integrated circuit chips. The foamed insulating material has lower...
US-7,064,006 Multiple die stack apparatus employing T-shaped interposer elements
Multiple integrated circuit devices in a stacked configuration that use a spacing element for allowing increased device density and increased thermal conduction...
US-7,064,002 Method for fabricating interposers including upwardly protruding dams, semiconductor device assemblies...
A dam for substantially laterally confining a quantity of encapsulant material over a region of a substrate, such as an interposer. The dam is configured to...
US-7,063,985 Method for fabricating sensor devices having improved switching properties
The invention provides an magnetic memory element having improved switching properties and zero field offset, and a manufacturing method thereof. The element...
US-7,063,603 Method and apparatus for cleaning a web-based chemical mechanical planarization system
A method and apparatus for cleaning a web-based chemical-mechanical planarization (CMP) system. Specifically, a fluid spray bar is coupled to a frame assembly...
US-7,063,599 Apparatus, systems, and methods for conditioning chemical-mechanical polishing pads
A conditioner includes abrasive elements for conditioning a polishing pad to be used in abrasive semiconductor substrate treatment processes, such as...
US-7,063,595 Method and apparatus for planarizing a microelectronic substrate with a tilted planarizing surface
A method and apparatus for planarizing a microelectronic substrate. In one embodiment, the apparatus can include an elongated, non-continuous polishing pad...
US-7,063,524 Apparatus for increased dimensional accuracy of 3-D object creation
A stereolithographic (STL) apparatus for forming structures such as semiconductor die packages is described which uses a laser beam focused to a generally...
US-7,063,466 Selectable and tunable ferrule holder for a fiber Fabry-Perot filter
The invention relates generally to optical interference filters and interferometers. Methods, devices and device components for fiber Fabry-Perot (FFP) filters...
US-7,062,761 Dynamic arrays and overlays with bounds policies
Systems and methods are provided for writing code to access data arrays. One aspect provides a method of accessing a memory array. Data is provided within a...
US-7,062,599 Flash memory programming
The various embodiments provide for programming floating-gate, or flash, memory devices by writing a block of data words to a volatile storage media from an...
US-7,061,817 Data path having grounded precharge operation and test compression capability
A data path for coupling data between a memory cell and an input/output (IO) line sense amplifier. An IO line coupling circuit is coupled to a pair of global...
US-7,061,811 Faster method of erasing flash memory
An erase operation in a flash memory device includes applying an erase pulse to memory cells of the flash memory device to convert the contents of the memory...
US-7,061,810 Erasing flash memory without pre-programming the flash memory before erasing
An erase operation in a flash memory device includes applying an erase pulse to memory cells of the flash memory device to convert the contents of the memory...
US-7,061,789 Sensing scheme for programmable resistance memory using voltage coefficient characteristics
A method and apparatus for sensing the resistance state of data in a resistance memory cell by using the voltage coefficient of the cell instead of only its...
US-7,061,413 Analog to digital conversion with offset cancellation
An analog to digital conversion circuit includes a voltage-to-charge converter coupled to a charge integrator and a comparator. The voltage-to-charge converter...
US-7,061,306 Voltage booster
Voltage boosters or pass circuits for generating a boosted voltage are advantageous in the decoding and programming of memory devices and, in particular, NAND...
US-7,061,226 Method to detect a defective element
The present invention relates to a method to detect at least one defective pixel in a spatial light modulator comprising numerous pixel elements. The spatial...
US-7,061,124 Solder masks including dams for at least partially surrounding terminals of a carrier substrate and recessed...
A solder mask for use on a carrier substrate includes a device-securing region positionable over at least a portion of a die-support location of the carrier...
US-7,061,119 Tape attachment chip-on-board assemblies
An apparatus and method for preventing damage to tape attachment semiconductor assemblies due to encapsulation filler particles causing damage to a semiconductor...
US-7,061,115 Interconnect line selectively isolated from an underlying contact plug
The present invention relates to selectively electrically connecting an electrical interconnect line, such as a bit line of a memory cell, with an associated...
US-7,061,111 Interconnect structure for use in an integrated circuit
A copper interconnect structure is disclosed as comprising a copper layer and an aluminum nitride layer formed over the copper layer. The aluminum nitride layer...
US-7,061,109 Semiconductor substrate-based BGA interconnection for testing semiconductor devices
The present invention relates to a method of forming interconnections for a temporary package, wherein the interconnections are capable of receiving solder balls...
US-7,061,092 High-density modularity for ICS
A high-density multi-chip module and method for construction thereof, wherein a plurality of integrated circuit dice with at least one row of generally central...
US-7,061,085 Semiconductor component and system having stiffener and circuit decal
A semiconductor component includes a stiffener, a circuit decal attached to the stiffener, and a semiconductor die attached to the stiffener. The circuit decal...
US-7,061,082 Semiconductor die with attached heat sink and transfer mold
A semiconductor device includes a heat sink adjacent to a die. A dam is positioned at the peripheral edges of the heat sink. During a transfer molding process,...
US-7,061,071 Non-volatile resistance variable devices and method of forming same, analog memory devices and method of...
In one implementation, a non-volatile resistance variable device includes a body formed of a voltage or current controlled resistance setable material, and at...
US-7,061,004 Resistance variable memory elements and methods of formation
A method and apparatus for providing a resistance variable memory element with improved data retention and switching characteristics have at least one...
US-7,060,637 Methods of forming intermediate semiconductor device structures using spin-on, photopatternable, interlayer...
A cap layer that enables a photopatternable, spin-on material to be used in the formation of semiconductor device structures at wavelengths that were previously...
US-7,060,631 Methods of cleaning surfaces of copper-containing materials, and methods of forming openings to...
The invention encompasses a semiconductor processing method of cleaning a surface of a copper-containing material by exposing the surface to an acidic mixture...
US-7,060,615 Methods of forming roughened layers of platinum
A method of forming a roughened layer of platinum, including: a) providing a substrate within a reaction chamber; b) forming an adhesion layer over the...
US-7,060,608 System and method for filling openings in semiconductor products
Explosive forces are used to fill interconnect material into trenches, via holes and other openings in semiconductor products. The interconnect material may be...
US-7,060,599 Method of forming shallow doped junctions having a variable profile gradation of dopants
Disclosed is an electrical device having, and a process for forming, a shallow junction with a variable concentration profile gradation of dopants. The process...
US-7,060,570 Methods of fabricating multiple sets of field effect transistors
The invention includes methods of fabricating multiple sets of field effect transistors. In one implementation, an etch stop layer is formed over an insulative...
US-7,060,569 Methods of fabricating multiple sets of field effect transistors
The invention includes methods of fabricating multiple sets of field effect transistors. In one implementation, an etch stop layer is formed over an insulative...
US-7,060,526 Wafer level methods for fabricating multi-dice chip scale semiconductor components
A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an...
US-7,060,521 Bonding method
The present invention relates to a method to form an integrated device, said device comprising a first substrate and at least one element provided on a second...
US-7,060,514 Process for fabricating films of uniform properties on semiconductor devices
A process for forming a thin layer exhibiting a substantially uniform property on an active surface of a semiconductor substrate includes varying the temperature...
US-7,059,937 Systems including differential pressure application apparatus
A differential pressure application apparatus is configured to apply different amounts of pressure to different locations of a substrate, such as a semiconductor...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.