Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: micron





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-7,052,922 Stable electroless fine pitch interconnect plating
A method and apparatus for plating facilitates the plating of a small contact feature of a wafer die while providing a relatively stable plating bath. The method...
US-7,052,617 Simplified etching technique for producing multiple undercut profiles
A process for producing multiple undercut profiles in a single material. A resist pattern is applied over a work piece and a wet etch is performed to produce an...
US-7,052,584 Method of forming a capacitor
A method of forming a capacitor having a capacitor dielectric layer comprising ABO.sub.3, where "A" is selected from the group consisting of Sn and Group IIA...
US-7,052,375 Method of making carrier head backing plate having low-friction coating
Planarizing machines, carrier heads for planarizing machines and methods for planarizing microelectronic-device substrate assemblies in mechanical or...
US-7,052,352 Anode screen for a phosphor display and method of making the same
An anode screen for a field-emission-display is formed by layering light-permeable conductive material and phosphor respectively over a transparent substrate. A...
US-7,052,350 Field emission device having insulated column lines and method manufacture
An FED and a method of manufacture are provided. The FED includes a cathode assembly containing an improved column line structure. The column line structure...
US-7,051,741 Reduction/oxidation material removal method
A method of resist stripping for use during fabrication of semiconductor devices. A semiconductor substrate with a resist material formed thereon, such as a...
US-7,051,729 Apparatus and methods for aligning a center of mass with a rotational axis of a shaft or spindle
Centering elements effectively reduce the clearance between a shaft and a rotatable element, such as a blade-fixing flange of a dicing saw for use with...
US-7,051,178 Burst write in a non-volatile memory device
A synchronous flash memory has been described that includes an array of non-volatile memory cells. The memory device has a package configuration that is...
US-7,050,708 Delivery of solid chemical precursors
Systems and methods are provided for delivering solid precursors. In certain embodiments of the present application, a flow monitor is used to measure and...
US-7,050,649 Suppression of ringing artifacts during image resizing
An economical method of detecting and suppressing ringing artifacts during digital image resizing is presented. The economical method substitutes costly division...
US-7,050,425 Apparatus for multiple media digital communication
Apparatus for media communication in a communication system. In one embodiment, the apparatus comprises: a processor; and a routine running on the processor for...
US-7,050,342 Testmode to increase acceleration in burn-in
A method and apparatus for simultaneously accessing multiple array blocks in a static random access memory (SRAM) device. During testing of the SRAM device, each...
US-7,050,330 Multi-state NROM device
An array of NROM flash memory cells configured to store at least two bits per four F.sup.2. Split vertical channels are generated along each side of adjacent...
US-7,050,327 Differential negative resistance memory
The invention relates to a DNR (differential negative resistance) exhibiting device that can be programmed to store information as readable current amplitudes...
US-7,050,319 Memory architecture and method of manufacture and operation thereof
An architecture, and its method of formation and operation, containing a high density memory array of semi-volatile or non-volatile memory elements, including,...
US-7,050,094 Wide dynamic range operation for CMOS sensor with freeze-frame shutter
Wide dynamic range operation is used to write a signal in a freeze-frame pixel into the memory twice, first after short integration and then after long...
US-7,049,861 Reduced current input buffer circuit
There is provided an input buffer circuit that, in one embodiment, includes an input buffer adapted to draw an operating current, a first buffer enabling...
US-7,049,840 Hybrid interconnect and system for testing semiconductor dice
An interconnect is provided for making electrical connections with a semiconductor die. The interconnect includes a substrate having integrally formed contact...
US-7,049,753 Method and apparatuses for providing uniform electron beams from field emission displays
The invention includes field emitters, field emission displays (FEDs), monitors, computer systems and methods employing the same for providing uniform electron...
US-7,049,700 Semiconductor test board having laser patterned conductors
A method for fabricating semiconductor components is performed using a laser scanner and a laser imaging process. A substrate, such as a semiconductor wafer,...
US-7,049,693 Electrical contact array for substrate assemblies
A substrate assembly is disclosed including a substrate and a plurality of spring-biased electrical contacts formed thereon for establishing electrical contact...
US-7,049,685 Packaged microelectronic devices with pressure release elements and methods for manufacturing and using such...
Packaged microelectronic devices, interconnecting units for packaged microelectronic devices, and methods and apparatuses for packaging microelectronic devices...
US-7,049,664 Semiconductor device structures formed by ion-assisted oxidation
Oxidation methods, and resulting structures, comprising providing an oxide layer on a substrate and then re-oxidizing the oxide layer by vertical ion bombardment...
US-7,049,244 Method for enhancing silicon dioxide to silicon nitride selectivity
A process for controlling the plasma etch of a silicon dioxide layer at a high etch rate and high selectivity with respect to silicon nitride, particularly in a...
US-7,049,238 Method for fabricating semiconductor device having recess
A method for forming a floating gate semiconductor device such as an electrically erasable programmable read only memory is provided. The device includes a...
US-7,049,237 Methods for planarization of Group VIII metal-containing surfaces using oxidizing gases
A planarization method includes providing a second and/or third Group VIII metal-containing surface (preferably, a platinum-containing surface) and positioning...
US-7,049,231 Methods of forming capacitors
In but one aspect of the invention, a method of depositing polysilicon comprises providing a substrate within a chemical vapor deposition reactor, with the...
US-7,049,219 Coating of copper and silver air bridge structures to improve electromigration resistance and other applications
An improved electrical interconnect for an integrated circuit and methods for providing the same are disclosed. The electrical interconnect includes an air...
US-7,049,206 Device isolation for semiconductor devices
Exemplary embodiments of the present invention disclose a semiconductor assembly having at least one isolation structure formed. The semiconductor assembly...
US-7,049,196 Vertical gain cell and array for a dynamic random access memory and method for forming the same
A vertical gain memory cell including an n-channel metal-oxide semiconductor field-effect transistor (MOSFET) and p-channel junction field-effect transistor...
US-7,049,192 Lanthanide oxide / hafnium oxide dielectrics
Dielectric layers containing a chemical vapor deposited hafnium oxide and an electron beam evaporated lanthanide oxide and a method of fabricating such a...
US-7,049,191 Method for protecting against oxidation of a conductive layer in said device
In a semiconductor device including a first conductive layer, the first conductive layer is treated with a nitrogen/hydrogen plasma before an additional layer is...
US-7,049,173 Method for fabricating semiconductor component with chip on board leadframe
A semiconductor component includes a chip on board leadframe, a semiconductor die back bonded and wire bonded to the leadframe, an encapsulant on the die and an...
US-7,049,153 Polymer-based ferroelectric memory
Integrated memory circuits, key components in thousands of electronic and computer products, have been made using ferroelectric materials, which offer faster...
US-7,049,009 Silver selenide film stoichiometry and morphology control in sputter deposition
A method of sputter depositing silver selenide and controlling the stoichiometry and nodular defect formations of a sputter deposited silver-selenide film. The...
US-7,048,968 Methods of depositing materials over substrates, and methods of forming layers over substrates
The invention includes methods of utilizing supercritical fluids to introduce precursors into reaction chambers. In some aspects, a supercritical fluid is...
US-7,047,455 Memory with element redundancy
A memory device to perform an erase operation algorithm that specifically deals with different types of defects in a memory array. The memory array of one...
US-7,047,351 Memory hub bypass circuit and method
A computer system and a method used to access data from a plurality of memory devices with a memory hub. The computer system includes a plurality of memory...
US-7,047,265 System and method for a single-pass multiple tap filter
A system and method for calculating an output value from a plurality of input sample values contributing to the output value in accordance with a respective...
US-7,046,578 Method and apparatus for memory device wordline
A method and apparatus for improving the speed of a wordline in a memory device. A wordline structure includes a main wordline for selectively distributing a...
US-7,046,562 Integrated circuit reset circuitry
An integrated circuit includes a reset connection to reset the device in response to an externally provided signal. The reset connection is used during test...
US-7,046,560 Reduction of fusible links and associated circuitry on memory dies
The number of fusible links and other circuit components required to provide memory cell redundancy are reduced by sharing physical memory locations among...
US-7,046,557 Flash memory
Flash memory devices having control circuitry to decrease the magnitude of a source voltage of a first polarity during an erase period to increase the magnitude...
US-7,046,547 Magnetic non-volatile memory coil layout architecture and process integration scheme
The invention relates to methods and apparatus that allow data to be stored in a magnetic memory cell, such as a giant magneto-resistance (GMR) cell, of a...
US-7,046,538 Memory stacking system and method
A method of forming a stacked memory module from a plurality of memory devices is provided. Each of the plurality of memory devices is modified to include a...
US-7,046,537 Reduced signal swing in bit lines in a CAM
A Content Addressable Memory device with a bit line that is driven between first and second voltage levels depending on the state of a logic signal applied...
US-7,046,536 Programable identification circuitry
An integrated circuit has been described that includes a user programmable identification code register. The register can be programmed by the user to emulate...
US-7,046,340 Method and apparatus for controlling radiation beam intensity directed to microlithographic substrates
A method and apparatus for controlling an intensity distribution of a radiation beam directed to a microlithographic substrate. The method can include directing...
US-7,046,339 Optimized optical lithography illumination source for use during the manufacture of a semiconductor device
A method and structure for optimizing an optical lithography illumination source comprises a shaped diffractive optical element (DOE) interposed between the...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.