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Patent # Description
US-9,159,780 Methods of forming capacitors
A method of forming capacitors includes forming support material over a substrate. A first capacitor electrode is formed within individual openings in the...
US-9,159,736 Data line arrangement and pillar arrangement in apparatuses
Some embodiments include an apparatus having semiconductor pillars in a substantially hexagonally closest packed arrangement. The hexagonally closest packed...
US-9,159,731 Methods of forming capacitors and semiconductor devices including a rutile titanium dioxide material
Methods of forming a capacitor including forming a titanium nitride material within at least one aperture defined by a support material, forming a ruthenium...
US-9,159,677 Methods of forming semiconductor device structures
A method of forming a semiconductor device structure comprises forming at least one reflective structure comprising at least two dielectric materials having...
US-9,159,662 Semiconductor structures having adhesion promoting layer in cavities
High aspect ratio trenches may be filled with metal that grows more from the bottom than the top of the trench. As a result, the tendency to form seams or to...
US-9,159,569 Methods of forming charge-trapping regions
Some embodiments include methods of forming charge-trapping zones. The methods may include forming nanoparticles, transferring the nanoparticles to a liquid to...
US-9,159,551 Methods of forming capacitors
A method of forming a capacitor includes depositing a dielectric metal oxide layer of a first phase to a thickness no greater than 75 Angstroms over an inner...
US-9,159,452 Automatic word line leakage measurement circuitry
The present invention is a circuit and method for measuring leakage on the plurality of word lines in a memory device. In one embodiment, a memory device may...
US-9,159,397 Methods and apparatuses for refreshing memory
Apparatuses and methods for memory refreshing memory cells is described. An example method includes receiving a self refresh command at a memory. The method...
US-9,159,393 Memory decoding
Memories, and methods of operating such memories, having a memory cell, sense circuitry having a gate, program circuitry and a decoder having a first signal...
US-9,159,392 Memory device word line drivers and methods
Memory subsystems and methods, such as those involving a memory cell array formed over a semiconductor material of a first type, such as p-type substrate. In at...
US-9,159,383 Signal management in a memory device
Command signal management methods and circuits in memory devices are disclosed. Command signals are selectively passed and blocked to enforce safe operating...
US-9,159,375 Selectively conducting devices, diode constructions, methods of forming diodes and methods of current modulation
Some embodiments include selectively conducting devices having a first electrode, a second electrode, and dielectric material between the first and second...
US-9,159,373 Enhanced block copy
Methods and apparatuses for an enhanced block copy. One embodiment is reading data from a source block located in a first portion of the memory device, and...
US-9,158,709 Power cycling event counters for invoking security action
Subject matter disclosed herein relates to memory devices and security of same.
US-9,158,667 Apparatuses and methods for performing logical operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an...
US-9,158,612 Refresh of non-volatile memory cells based on fatigue conditions
In one or more of the disclosed embodiments, memory cells in a memory device are refreshed upon an indication of a fatigue condition. In one such embodiment,...
US-9,158,607 Apparatuses and methods for operating a memory device
Subject matter described pertains to apparatuses and methods for operating a memory device.
US-9,158,336 Cases for tablet computers and methods
Cases for tablet computers and methods are disclosed. An embodiment of one such case has an interface configured to allow the tablet computer to communicate...
US-9,157,960 Through-substrate via (TSV) testing
Various embodiments comprise apparatuses and methods for testing and repairing through-substrate vias in a stack of interconnected dice. In various embodiments,...
US-9,157,014 Adhesives including a filler material and related methods
Temporary adhesives include a thermoplastic polymer comprising from about 30% by weight to about 80% by weight of the temporary adhesive, a solvent comprising...
US-9,154,141 Continuous high-frequency event filter
A circuit and method for generating an active output signal in response to detecting N events, which are represented by an event signal. A counter circuit is...
US-9,154,131 Enhanced performance memory systems and methods
Digital memory devices and systems, including memory systems and methods for operating such memory systems are disclosed. In the embodiments, a memory system...
US-9,153,777 Thermally optimized phase change memory cells and methods of fabricating the same
A thermally optimized phase change memory cell includes a phase change material element disposed between first and second electrodes. The second electrode...
US-9,153,776 Memory cells and methods of forming memory cells
Some embodiments include a memory cell having an electrode and a switching material over the electrode. The electrode is a first composition which includes a...
US-9,153,614 Method and apparatus for lens alignment for optically sensitive devices and systems implementing same
Non-symmetrically located lenses are employed with semiconductor devices comprising optically active regions which are non-symmetrically located on a surface...
US-9,153,526 Microelectronic devices and methods for manufacturing microelectronic devices
Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. One such method includes forming a plurality of apertures in...
US-9,153,520 Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods
Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die...
US-9,153,497 Semiconductor constructions
Some embodiments include methods in which a pair of spaced-apart adjacent features is formed over a substrate. The features have silicon dioxide surfaces....
US-9,153,491 Methods for forming conductive elements and vias on substrates and for forming multi-chip modules
Methods of forming conductive elements on and in a substrate include forming a layer of conductive material over a surface of a substrate prior to forming a...
US-9,153,485 Methods of processing substrates and methods of forming conductive connections to substrates
Embodiments disclosed include methods of processing substrates, including methods of forming conductive connections to substrates. In one embodiment, a method...
US-9,153,458 Methods of forming a pattern on a substrate
A method of forming a pattern on a substrate includes forming a repeating pattern of four first lines elevationally over an underlying substrate. A repeating...
US-9,153,455 Methods of forming semiconductor device structures, memory cells, and arrays
Methods of forming semiconductor devices, memory cells, and arrays of memory cells include forming a liner on a conductive material and exposing the liner to a...
US-9,153,451 Method of forming a planar surface for a semiconductor device structure, and related methods of forming a...
A method of forming a planar surface for a semiconductor device structure. The method comprises forming a particle film comprising a plurality of discrete...
US-9,153,334 Memory devices including capacitor structures having improved area efficiency
Semiconductor structures including a plurality of conductive structures having a dielectric material therebetween are disclosed. The thickness of the dielectric...
US-9,153,312 Methods and apparatuses including transmitter circuits
Methods and apparatuses are disclosed for transmitter circuits. One example apparatus includes a pre-driver circuit configured to provide a transition control...
US-9,153,305 Independently addressable memory array address spaces
Examples of the present disclosure provide devices and methods for accessing a memory array address space. An example memory array comprising a first address...
US-9,153,303 Methods and apparatuses for alternate clock selection
Apparatuses and methods are disclosed, such as those including an oscillator circuit that generates an alternate clock. A multiplexing circuit can be coupled to...
US-9,152,559 Metadata storage associated with wear-level operation requests
A method includes responding to a wear-level operation request by copying data from a first portion of a first memory array to a second portion of the first...
US-9,152,546 Fault-tolerant non-volatile integrated circuit memory
Apparatus and methods are disclosed, such as those that store data in a plurality of non-volatile integrated circuit memory devices, such as NAND flash, with...
US-9,152,512 Apparatus and methods for providing data integrity
The present disclosure includes apparatus (e.g., computing systems, memory systems, controllers, etc.) and methods for providing data integrity. One or more...
US-9,148,176 Circuits, apparatuses, and methods for correcting data errors
One example apparatus includes a first circuit configured to receive first and second data words, to correct one or more errors in the first data word, to merge...
US-9,148,172 Data compression and management
The present disclosure includes apparatuses and methods for data compression and management. A number of methods include receiving a number of data segments...
US-9,148,170 Methods and apparatuses for low-power multi-level encoded signals
Methods and apparatuses for providing multi-level encoded signals are disclosed. An apparatus may include an encoding circuit and a multi-level encoder. The...
US-9,147,839 Memory cells with recessed electrode contacts
Memory cells with recessed electrode contacts and methods of forming the same are provided. An example memory cell can include an electrode contact formed in a...
US-9,147,838 Phase change current density control structure
A phase change memory element and method of forming the same. The memory element includes first and second electrodes. A first layer of phase change material is...
US-9,147,803 Engineered substrates having epitaxial formation structures with enhanced shear strength and associated systems...
Engineered substrates having epitaxial formation structures with enhanced shear strength and associated systems and methods are disclosed herein. In several...
US-9,147,735 Apparatus and method for controlling diffusion
A method and device for reducing a dopant diffusion rate in a doped semiconductor region is provided. The methods and devices include selecting a plurality of...
US-9,147,729 Methods of forming transistors
Some embodiments include methods of forming transistors. Recesses are formed to extend into semiconductor material. The recesses have upper regions lined with...
US-9,147,712 Method and apparatus providing pixel array having automatic light control pixels and image capture pixels
A pixel array uses two sets of pixels to provide accurate exposure control. One set of pixels provide continuous output signals for automatic light control...
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