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Patent # Description
US-9,135,984 Apparatuses and methods for writing masked data to a buffer
Disclosed are apparatuses and methods for writing data to a memory array of a buffer. One such apparatus may include a multiplexer that receives data words and...
US-9,135,978 Memory programming methods and memory systems
Memory programming methods and memory systems are described. One example memory programming method includes programming a plurality of main cells of a main...
US-9,135,962 Comparators for delta-sigma modulators
Methods, systems and devices are disclosed, such as an electronic device that includes a plurality of data locations and a delta-sigma modulator. In some...
US-9,135,100 Cooperative memory error detection and repair
Some embodiments include apparatuses and methods having a memory structure included in a memory device and a control unit included in the memory device. The...
US-9,132,423 Sample-to-answer microfluidic cartridge
A microfluidic cartridge and methods for performing a diagnostic, molecular or biochemical assay thereon, where all dried and/or liquid reagents necessary for...
US-9,131,985 Medical treatment device
Provided is a medical treatment device capable of eliminating inconvenience of manipulation in actual clinical use, and ensuring a visual field by introducing a...
US-9,130,793 Constant delay zero standby differential logic receiver and method
A differential receiver circuit on an integrated circuit consumes substantially no standby power, has constant propagation delay regardless of the input common...
US-9,130,164 Resistive random access memory devices, and related semiconductor device structures
A method of forming a chalcogenide material on a surface of a substrate comprising exposing a surface of a substrate to ionized gas clusters from a source gas,...
US-9,130,163 Phase change memory structures and methods
A method of forming a phase change material memory cell includes forming a number of memory structure regions, wherein the memory structure regions include a...
US-9,130,157 Memory cells having a number of conductive diffusion barrier materials and manufacturing methods
Memory cells having a select device material located between a first electrode and a second electrode, a memory element located between the second electrode and...
US-9,129,983 Memory cells, memory arrays, methods of forming memory cells, and methods of forming a shared doped...
A memory cell includes a thyristor having a plurality of alternately doped, vertically superposed semiconductor regions; a vertically oriented access transistor...
US-9,129,961 Gallium lathanide oxide films
Electronic apparatus and methods of forming the electronic apparatus include a gallium lanthanide oxide film for use in a variety of electronic systems. The...
US-9,129,896 Arrays comprising vertically-oriented transistors, integrated circuitry comprising a conductive line buried in...
An array includes vertically-oriented transistors, rows of access lines, and columns of data/sense lines. Individual of the rows include an access line...
US-9,129,869 Pillar on pad interconnect structures, semiconductor devices including same and related methods
Methods of fabricating interconnect structures for semiconductor dice comprise forming conductive elements in contact with bond pads on an active surface over a...
US-9,129,862 Microelectronic devices and microelectronic support devices, and associated assemblies and methods
Microelectronic devices, associated assemblies, and associated methods are disclosed herein. For example, certain aspects of the invention are directed toward a...
US-9,129,848 Method and structure for integrating capacitor-less memory cell with logic
Methods for fabricating integrated circuits include fabricating a logic device on a substrate, forming an intermediate semiconductor substrate on a surface of...
US-9,129,847 Transistor structures and integrated circuitry comprising an array of transistor structures
This invention includes a capacitorless one transistor DRAM cell that includes a pair of spaced source/drain regions received within semiconductive material. An...
US-9,129,845 Buried low-resistance metal word lines for cross-point variable-resistance material memories
Variable-resistance material memories include a buried salicide word line disposed below a diode. Variable-resistance material memories include a metal spacer...
US-9,129,837 Semiconductor device
A semiconductor device has an active region defined by a device isolation region arranged on a surface of a semiconductor substrate, a plurality of transistor...
US-9,129,798 Methods of forming semiconductor structures comprising aluminum oxide
A semiconductor structure comprising aluminum oxide. The semiconductor structure comprises a dielectric material overlying a substrate. The aluminum oxide...
US-9,129,694 Slew rate modulation
Apparatus and methods may operate so that arrival times of a data signal at gates of transistors are controlled to switch the transistors at different times to...
US-9,129,684 Dynamic program window determination in a memory device
A memory device has an array of memory cells and a controller coupled to the array of memory cells. The controller is configured to determine a program window...
US-9,129,662 Circuits, devices, systems, and methods of operation for capturing data signals
Embodiments of the invention describe driving data onto a bus. The embodiments include a data driver circuit having a data capture circuit coupled to the bus....
US-9,128,894 Bus controller
A bus controller has a displacer, an arithmetic logic unit coupled to the displacer, and a replacer selectively coupled to the displacer and the arithmetic...
US-9,128,869 Systems and methods involving managing a problematic memory cell
Methods and apparatus are provided for identifying which symbol within a codeword corresponds to an information state read from a problematic memory cell. A...
US-9,128,762 Persistent content in nonvolatile memory
Applications may request persistent storage in nonvolatile memory. The persistent storage is maintained across power events and application instantiations....
US-9,128,637 Logical unit operation
The present disclosure includes methods and devices for logical unit operation. One device embodiment includes a number of logical units, wherein each of the...
US-9,128,383 Sub-resolution assist devices and methods
Photolithographic apparatus, systems, and methods that make use of sub-resolution assist devices are disclosed. In the various embodiments, an imaging mask...
US-9,124,301 Error correction code for unidirectional memory
A memory array and a method of writing to a unidirectional non-volatile storage cell are disclosed whereby a user data word is transformed to an internal data...
US-9,124,253 Methods and apparatuses for duty cycle preservation
Methods and apparatuses are disclosed for preserving duty cycle at voltage domain boundaries. One example apparatus includes a complement generation circuit...
US-9,124,174 DC-DC converter switching transistor current measurement technique
A method is described comprising conducting a first current through a switching transistor. The method also comprises conducting a second current through a pair...
US-9,123,891 Diode for variable-resistance material memories, processes of forming same, and methods of using same
A variable-resistance material memory (VRMM) device includes a container conductor disposed over an epitaxial semiconductive prominence that is coupled to a...
US-9,123,888 Memory cells and memory cell arrays
Some embodiments include memory cells. The memory cells may have a first electrode, and a trench-shaped programmable material structure over the first...
US-9,123,786 Interconnect line selectively isolated from an underlying contact plug
A means for selectively electrically connecting an electrical interconnect line, such as a bit line of a memory cell, with an associated contact stud and...
US-9,123,722 Semiconductor constructions and methods of forming interconnects
Some embodiments include methods of forming interconnects. A first circuitry level may be formed, and a first dielectric region may be formed over such first...
US-9,123,700 Integrated circuit constructions having through substrate vias and methods of forming integrated circuit...
An integrated circuit construction includes a stack of two or more integrated circuit substrates. At least one of the substrates includes through substrate vias...
US-9,123,552 Apparatuses enabling concurrent communication between an interface die and a plurality of dice stacks,...
Various embodiments include apparatuses, stacked devices and methods of forming dice stacks on an interface die. In one such apparatus, a dice stack includes at...
US-9,123,423 Programming operations in a memory device
Methods for sensing, method for programming, memory devices, and memory systems are disclosed. In one such method for sensing, a counting circuit generates a...
US-9,123,415 Methods of operating a phase change memory cell
A PCRAM cell has a gradated or layered resistivity bottom electrode with higher resistivity closer to a phase change material, to provide partial heating near...
US-9,123,414 Memory systems and memory programming methods
Memory systems and memory programming methods are described. According to one aspect, a memory system includes program circuitry configured to provide a program...
US-9,123,409 Memory device for a hierarchical memory architecture
A hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port...
US-9,123,405 Multiple device apparatus, systems, and methods
Apparatus, systems, and methods are disclosed that operate to generate a clock signal in a die in a stack and to receive the clock signal in another die in the...
US-9,122,420 Memory devices having special mode access
A memory device includes a memory array, a special mode enable register, and a controller. When the controller receives a register write command to write first...
US-9,122,168 Lithography method and device
Lithography methods and devices are shown that include a semiconductor structure such as a mask. Methods and devices are shown that include a pattern of mask...
US-9,121,869 Probe assembly, probe card including the same, and methods for manufacturing these
Quality of connection portions between respective probes and respective wires in a probe assembly is improved. Also, time required for work for connection...
US-9,120,091 Nanoparticle positioning technique
Embodiments of the present invention are generally directed to a method for disposing nanoparticles on a substrate. In one embodiment, a substrate having a...
US-9,118,327 Boolean logic in a state machine lattice
Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic...
US-9,118,004 Memory cells and methods of forming memory cells
Some embodiments include methods of forming memory cells. Programmable material may be formed directly adjacent another material. A dopant implant may be...
US-9,117,998 Nonvolatile memory cells and methods of forming nonvolatile memory cells
A method of forming a nonvolatile memory cell includes forming a first electrode having a first current conductive material and a circumferentially self-aligned...
US-9,117,928 Cross-point diode arrays and methods of manufacturing cross-point diode arrays
Methods of forming an array of memory cells and memory cells that have pillars. Individual pillars can have a semiconductor post formed of a bulk semiconductor...
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