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Patent # Description
US-9,099,314 Pitch multiplication spacers and methods of forming the same
Spacers in a pitch multiplication process are formed without performing a spacer etch. Rather, the mandrels are formed over a substrate and then the sides of...
US-9,099,309 Method providing an epitaxial growth having a reduction in defects and resulting structure
Disclosed are methods and resulting structures which provide an opening for epitaxial growth, the opening having an associated projection for reducing the size...
US-9,099,272 Field emission devices and methods for making the same
The present disclosure includes field emission device embodiments. The present disclosure also includes method embodiments for forming field emitting devices....
US-9,099,189 Methods and devices for memory reads with precharged data lines
Methods of operating memory devices including precharging an adjacent pair of data lines to a particular voltage, isolating one data line of the adjacent pair...
US-9,099,174 Drift acceleration in resistance variable memory
The present disclosure includes apparatuses and methods including drift acceleration in resistance variable memory. A number of embodiments include applying a...
US-9,098,440 Secure compact flash
Methods and apparatus are provided, such as a memory card with a processor and nonvolatile memory coupled thereto. The nonvolatile memory has a secure area...
US-9,097,761 Chip stack device testing method, chip stack device rearranging unit, and chip stack device testing apparatus
A plurality of chip stack devices having different external sizes can be tested accurately and efficiently with low cost. The present invention provides a chip...
US-9,096,730 Methods of utilizing block copolymer to form patterns
Some embodiments include methods of forming patterns. A block copolymer film may be formed over a substrate, with the block copolymer having an intrinsic glass...
US-9,095,071 Multilayer wiring board and method for manufacturing the same
Provided is a method for manufacturing a multi-layer wiring board and the multi-layer wiring board that are capable of suppressing variation in resistance...
US-9,093,641 Methods of forming memory cells, and methods of patterning chalcogenide-containing stacks
Some embodiments include methods of forming memory cells. Chalcogenide is formed over a plurality of bottom electrodes, and top electrode material is formed...
US-9,093,636 Incorporation of oxygen into memory cells
Electronic apparatus, systems, and methods include a resistive random access memory cell having an oxygen gradient in a variable resistive region of the...
US-9,093,589 Solid state lighting devices without converter materials and associated methods of manufacturing
Solid state lighting devices that can produce white light without a phosphor are disclosed herein. In one embodiment, a solid state lighting device includes a...
US-9,093,368 Nonvolatile memory cells and arrays of nonvolatile memory cells
A nonvolatile memory cell includes first and second electrodes. Programmable material and a select device are received in series between and with the first and...
US-9,093,367 Methods of forming doped regions in semiconductor substrates
Some embodiments include methods of forming one or more doped regions in a semiconductor substrate. Plasma doping may be used to form a first dopant to a first...
US-9,093,311 Techniques for providing a semiconductor memory device
Techniques for providing a semiconductor memory device are disclosed. In one embodiment, the techniques may be realized as a semiconductor memory device...
US-9,093,266 Forming high aspect ratio isolation structures
An isolation structure, such as a trench isolation structure, may be formed by forming an aperture in a semiconductor substrate and then filling the aperture...
US-9,093,162 Sensing memory cells
The present disclosure includes methods, devices, modules, and systems for operating memory cells. One method embodiment includes applying a ramping voltage to...
US-9,093,152 Multiple data line memory and methods
Apparatuses and methods are disclosed, including an apparatus with rows of vertical strings of memory cells coupled to a common source and multiple data lines...
US-9,093,142 Phase change memory adaptive programming including pulse transition time adjustment
Some embodiments include methods and apparatus having a module configured to program a memory cell using a signal to cause the memory cell to have a programmed...
US-9,092,388 Bus width negotiation
There is provided a method and apparatus for bus negotiation. One such method includes determining a configuration of a first bond pad, the first bond pad...
US-9,092,387 Non-volatile memory device capable of initiating transactions
A non-volatile memory may operate, not in a master/slave arrangement, but in a peer-to-peer arrangement. In some embodiments, the memory may initiate a...
US-9,090,460 Plasma processing with preionized and predissociated tuning gases and associated systems and methods
Plasma processing systems and methods for using pre-dissociated and/or pre-ionized tuning gases are disclosed herein. In one embodiment, a plasma processing...
US-9,090,095 Optical writer for flexible foils
The technology disclosed relates to patterning of flexible substrate. One implementation can be applied for production of flexible displays and other electronic...
US-RE45,633 Reduced crosstalk sensor and method of formation
Isolation methods and devices for isolating regions of a semiconductor device are disclosed. The isolation methods and structures include forming an isolating...
US-9,088,418 System and method for updating read-only memory in smart card memory modules
A storage device contains a smart-card device and a memory device, both connected to a controller. The storage device may be used in the same manner as a...
US-9,088,303 Codewords that span pages of memory
The present disclosure includes apparatuses and methods for codewords that span pages of memory. A number of methods include writing a first portion of a...
US-9,087,989 GCIB-treated resistive device
The present disclosure includes GCIB-treated resistive devices, devices utilizing GCIB-treated resistive devices (e.g., as switches, memory cells), and methods...
US-9,087,895 Vertical devices and methods of forming
Vertical devices and methods of forming the same are provided. One example method of forming a vertical device can include forming a trench in a semiconductor...
US-9,087,874 Methods of forming graphene-containing switches
Some embodiments include methods of forming graphene-containing switches. A bottom electrode may be formed over a base, and a first electrically conductive...
US-9,087,737 Methods of forming charge storage structures including etching diffused regions to form recesses
Methods are disclosed that include selectively etching diffused regions to form recesses in semiconductor material, and forming charge storage structures in the...
US-9,087,730 DRAM with nanofin transistors
One aspect of the present subject matter relates to a memory. A memory embodiment includes a nanofin transistor having a first source/drain region, a second...
US-9,087,721 Devices including fin transistors robust to gate shorts and methods of making the same
Disclosed are methods, systems and devices, including a method that includes the acts of etching an inter-row trench in a substrate, substantially or entirely...
US-9,087,699 Methods of forming an array of openings in a substrate, and related methods of forming a semiconductor device...
A method of forming an array of openings in a substrate. The method comprises forming a template structure comprising a plurality of parallel features and a...
US-9,087,600 Two-part programming methods
Programming a memory in two parts to reduce cell disturb is disclosed. In at least one embodiment, data is programmed in two or more sequences of programming...
US-9,087,594 Memory apparatus, systems, and methods
Threshold voltages in a charge storage memory are controlled by threshold voltage placement, such as to provide more reliable operation and to reduce the...
US-9,087,583 Devices and methods to program a memory cell
Subject matter disclosed herein relates to memory devices and, more particularly, to programming a memory cell.
US-9,087,578 Configurable reference current generation for non volatile memory
This disclosure relates to generating a reference current for a memory device. In one aspect, a non-volatile memory device, such as a phase change memory...
US-9,087,570 Apparatuses and methods for controlling a clock signal provided to a clock tree
Apparatuses, sense circuits, and methods for controlling a clock signal to a clock tree is described. An example apparatus includes a consecutive write command...
US-9,087,025 Data encoding using spare channels in a memory system
Implementations of encoding techniques are disclosed. The encoding technique, such as a Data bus Inversion (DBI) technique, is implementable in a...
US-9,086,983 Apparatus and methods for providing data integrity
The present disclosure includes apparatus (e.g., computing systems, memory systems, controllers, etc.) and methods for providing data integrity. One or more...
US-9,084,360 Electronic device assemblies including conductive vias having two or more conductive elements
Electronic devices include a substrate with first and second pairs of conductive traces extending in or on the substrate. A first conductive interconnecting...
US-9,083,575 Devices having different effective series resistance states and methods for controlling such devices
Devices and methods are described, such as those including parallel paths coupled between a first power supply and a second power supply. The parallel paths...
US-9,083,358 Delay lock loop phase glitch error filter
A method and apparatus is provided for providing a phase glitch error filter for a delay lock loop. The device comprises a delay lock loop to provide an output...
US-9,082,969 Keyhole-free sloped heater for phase change memory
Subject matter disclosed herein relates to a method of manufacturing a semiconductor integrated circuit device, and more particularly to a method of fabricating...
US-9,082,966 Methods of forming semiconductor devices and structures with improved planarization, uniformity
Semiconductor devices and structures, such as phase change memory devices, include peripheral conductive pads coupled to peripheral conductive contacts in a...
US-9,082,956 Confined cell structures and methods of forming confined cell structures
Techniques for reducing damage in memory cells are provided. Memory cell structures are typically formed using dry etch and/or planarization processes which...
US-9,082,829 Methods for forming arrays of small, closely spaced features
Methods of forming arrays of small, densely spaced holes or pillars for use in integrated circuits are disclosed. Various pattern transfer and etching steps can...
US-9,082,783 Semiconductor device and fabrication method thereof
The semiconductor device fabrication method of the present invention includes: laminating a plurality of amorphous silicon films on a semiconductor substrate,...
US-9,082,772 Stair step formation using at least two masks
Apparatuses and methods for stair step formation using at least two masks, such as in a memory device, are provided. One example method can include forming a...
US-9,082,748 Devices, systems, and methods related to removing parasitic conduction in semiconductor devices
Semiconductor devices and methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes...
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