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Patent # Description
US-9,082,721 Structures comprising masks comprising carbon
The critical dimension (CD) of features formed during the fabrication of a semiconductor device may be controlled through the use of a dry develop chemistry...
US-9,082,692 Engineered substrate assemblies with epitaxial templates and related systems, methods, and devices
Engineered substrates having epitaxial templates for forming epitaxial semiconductor materials and associated systems and methods are disclosed herein. In...
US-9,082,555 Structure comprising multiple capacitors and methods for forming the structure
Capacitors, apparatus including a capacitor, and methods for forming a capacitor are provided. One such capacitor may include a first conductor a second...
US-9,082,494 Memory cells having a common gate terminal
Arrays of memory cells having a common gate terminal and methods of operating and forming the same are described herein. As an example, an array of memory cells...
US-9,082,485 Apparatuses and methods including memory array and data line architecture
Some embodiments include apparatus and methods having memory cells located in different device levels of a device, at least a portion of a transistor located in...
US-9,082,477 Set pulse for phase change memory programming
A memory device and method for programming the memory device, including a method for a melting phase change memory cell by applying an electronic signal at a...
US-9,082,474 Method and apparatus for providing preloaded non-volatile memory content
An embodiment providing one or more improvements includes a memory loading system and method for at least managing testing of a memory unit using a memory test...
US-9,082,471 Power saving memory apparatus, systems, and methods
Some embodiments include a voltage generator to generate a voltage to apply to a line used to access a memory cell of a memory device in which the voltage is...
US-9,082,466 Apparatuses and methods for adjusting deactivation voltages
Apparatuses and methods for adjusting deactivation voltages are described herein. An example apparatus may include a voltage control circuit. The voltage...
US-9,081,718 Systems and methods for storing and recovering controller data in non-volatile memory devices
Systems and methods are disclosed for storing the firmware and other data of a flash memory controller, such as using a RAID configuration across multiple flash...
US-9,081,717 Memory quality monitor based compensation method and apparatus
In one embodiment, an encoder reads a set of data from memory cells to obtain retrieved data influenced by one or more distortion mechanisms as a result of...
US-9,081,674 Dual mapping between program states and data patterns
The present disclosure includes methods and apparatuses for dual mapping between program states and data patterns. One apparatus includes a memory and a...
US-9,081,042 Resistive memory element sensing using averaging
A system for determining the logic state of a resistive memory cell element, for example an MRAM resistive cell element. The system includes a controlled...
US-9,079,436 Printing apparatus with cutter mechanism
A movable BF guide is provided in a movable-blade receiving area into which a movable blade slides along a fixed blade while being pressed against the fixed...
US-9,077,305 Adaptive on die decoupling devices and methods
Semiconductor dies and methods are described, such as those including a first capacitive pathway having a first effective series resistance (ESR) and a second...
US-9,076,963 Phase change memory cells and methods of forming phase change memory cells
A phase change memory cell includes a first electrode having a cylindrical portion. A dielectric material having a cylindrical portion is longitudinally over...
US-9,076,888 Silicided recessed silicon
Methods and structures are provided for full silicidation of recessed silicon. Silicon is provided within a trench. A mixture of metals is provided over the...
US-9,076,867 Semiconductor device structures including strained transistor channels
The present invention includes methods for stressing transistor channels of semiconductor device structures. Such methods include the formation of so-called...
US-9,076,835 Vertically base-connected bipolar transistor
Methods, devices, and systems for using and forming vertically base-connected bipolar transistors have been shown. The vertically base-connected bipolar...
US-9,076,824 Memory arrays with a memory cell adjacent to a smaller size of a pillar having a greater channel length than a...
The disclosure is related to memory arrays and methods. One such memory array has a substantially vertical pillar. A memory cell adjacent to the pillar where...
US-9,076,757 Methods of forming a plurality of capacitors
A method of forming a plurality of capacitors includes providing a plurality of capacitor electrodes, an elevationally inner insulative retaining material...
US-9,076,686 Field effect transistor constructions and memory arrays
A field effect transistor construction comprises two source/drain regions and a channel region there-between. The channel region comprises a transition metal...
US-9,076,680 Integrated circuitry, methods of forming capacitors, and methods of forming integrated circuitry comprising an...
A method of forming capacitors includes providing a support material over a substrate. The support material is at least one of semiconductive or conductive....
US-9,076,662 Fin-JFET
Methods, devices, and systems integrating Fin-JFETs and Fin-MOSFETs are provided. One method embodiment includes forming at least on Fin-MOSFET on a substrate...
US-9,076,547 Level compensation in multilevel memory
Some embodiments include apparatuses and methods having a compensation unit to provide a compensation value based at least in part on a threshold voltage value...
US-9,076,543 Techniques for providing a direct injection semiconductor memory device
Techniques for providing a direct injection semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as...
US-9,076,528 Apparatus including memory management control circuitry and related methods for allocation of a write block cluster
Memory system controllers can include non-volatile memory control circuitry including a plurality of channel control circuits. Each of the plurality of channel...
US-9,076,524 Method of accessing a memory device
A method is provided for accessing a memory device. The method includes programming data in a plurality of cells of the memory device in a first programming...
US-9,076,501 Apparatuses and methods for reducing current leakage in a memory
Apparatuses, sense amplifier circuits, and methods for operating a sense amplifier circuit in a memory are described. An example apparatus includes a sense...
US-9,075,814 Memory device, electronic system, and methods associated with modifying data and a file of a memory device
A memory device, system and method of editing a file in a non-volatile memory device is described. The memory device includes a controller and a memory array...
US-9,075,770 Apparatuses and methods for memory testing and repair
Some embodiments include apparatuses and methods having a first interface to communicate with a processing unit, a second interface to communicate with a memory...
US-9,075,765 State change in systems having devices coupled in a chained configuration
The present disclosure includes methods, devices, and systems for state change in systems having devices coupled in a chained configuration. A number of...
US-9,075,725 Persistent memory for processor main memory
Subject matter disclosed herein relates to a system of one or more processors that includes persistent memory.
US-9,075,428 Results generation for state machine engines
A state machine engine includes a storage element, such as a (e.g., match) results memory. The storage element is configured to receive a result of an analysis...
US-9,075,317 Photomasks, methods of forming a photomask, and methods of photolithographically patterning a substrate
A photomask includes a substrate having a device region and an adjacent edge region over transparent material. The device region includes spaced primary...
US-9,075,083 Probe card
An electrode and wiring can be provided on an FPC board without restriction by a through hole. A probe card in which an FPC board of a probe assembly is fixed...
US-9,071,762 Image sensor including real-time automatic exposure control and swallowable pill including the same
An imager and a method for real-time, non-destructive monitoring of light incident on imager pixels during their exposure to light. Real-time or present pixel...
US-9,071,273 Extended single-bit error correction and multiple-bit error detection
Some embodiments include apparatus and methods to prevent at least one of misidentifying and ignoring multiple-bit errors if the multiple-bit errors include a...
US-9,071,235 Apparatuses and methods for changing signal path delay of a signal path responsive to changes in power
Apparatuses and methods for changing a signal path delay of a signal path responsive to changes in power provided to the signal path are disclosed. An example...
US-9,071,231 Apparatuses and methods for duty cycle adjustments
Apparatuses and methods have been disclosed. One such apparatus includes a plurality of gates coupled together in series. A first pull-down circuit can be...
US-9,070,874 Memory cell structures
The present disclosure includes memory cell structures and method of forming the same. One such memory cell includes a first electrode having sidewalls angled...
US-9,070,858 Method, system, and device for storage cell, such as for memory
Embodiments disclosed herein may relate to forming an interface between a selector transistor and a phase change material storage cell in a memory device.
US-9,070,767 Vertical memory devices and apparatuses
Vertical memory devices comprise vertical transistors, buried digit lines extending in a first direction in an array region, and word lines extending in a...
US-9,070,656 Underfill-accommodating heat spreaders and related semiconductor device assemblies and methods
Heat spreaders for dissipating heat from semiconductor devices comprise a contact surface located within a recess on an underside of the heat spreader, the...
US-9,070,641 Methods for forming assemblies and multi-chip modules including stacked semiconductor dice
An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first...
US-9,070,473 Refresh architecture and algorithm for non-volatile memories
Methods and systems to refresh a non-volatile memory device, such as a phase change memory. In an embodiment, as a function of system state, a memory device...
US-9,070,470 Sensing memory cells coupled to different access lines in different blocks of memory cells
In an embodiment, a target memory cell in a first block of memory cells of a memory device and a target memory cell in a second block of memory cells of the...
US-9,070,469 Digital filters with memory
A memory device that, in certain embodiments, includes a memory element coupled to a bit-line and a quantizing circuit coupled to the memory element via the...
US-9,070,459 Erase operation control sequencing apparatus, systems, and methods
Apparatus, systems, and methods may operate to receive an external erase command at a control circuit coupled to an erasable memory array located on a...
US-9,070,450 Non-volatile multilevel memory cells
The present disclosure includes methods, devices, modules, and systems for operating non-volatile multilevel memory cells. One method embodiment includes...
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