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Patent # Description
US-9,146,257 Contact probe and probe card
A contact probe electrically connects the tester side and an electrode pad of a circuit to be tested. This contact probe has a mounting portion on a base end...
US-9,146,256 Probe assembly for inspecting power semiconductor devices and inspection apparatus using the same, the probe...
A probe assembly for inspecting power semiconductor devices, which includes a probe block having more than one probe holding hole, more than one probe, each of...
US-9,146,246 Microfluidic apparatus and methods for performing blood typing and crossmatching
Microfluidic cartridges for agglutination reactions are provided. The cartridges include a microfluidic reaction channel with at least two intake channels, one...
US-9,146,193 Scatterometry metrology methods and methods of modeling formation of a vertical region of a multilayer...
A scatterometry target formed relative to an elevationally outermost surface of a substrate includes features having an optical property that is different from...
US-9,144,149 Heat-dissipating assemblies and methods of assembling heat-dissipating assemblies
Heat-dissipating assemblies may comprise mounting tabs attached to heat-generating electrical components at a first surface of each mounting tab. An opposing...
US-9,143,132 Termination for complementary signals
Apparatuses including termination for complementary signals are described, along with methods for terminating complementary signals. One such apparatus includes...
US-9,142,770 Resistive RAM devices and methods
The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One...
US-9,142,767 Resistive memory cell including integrated select device and storage element
Resistive memory cells including an integrated select device and storage element and methods of forming the same are described herein. As an example, a...
US-9,142,766 Memory cells containing metal oxides
Some embodiments include memory cells which have first and second metal oxides between first and second electrodes. The first and second electrodes include...
US-9,142,670 Methods of forming dual gate structures
Semiconductor devices including dual gate structures and methods of forming such semiconductor devices are disclosed. For example, semiconductor devices are...
US-9,142,629 Semiconductor device having shared diffusion layer between transistors
A device includes a first transistor including a first gate electrode including first and second parallel electrode portions each extending in a first...
US-9,142,504 Semiconductor device structures
Methods of forming features are disclosed. One method comprises forming a resist over a pool of acidic or basic material on a substrate structure, selectively...
US-9,142,460 Methods of forming gated devices
Some embodiments include methods of forming gated devices. An upper region of a semiconductor material is patterned into a plurality of walls that extend...
US-9,142,427 Methods of making an interposer structure with embedded capacitor structure
A device is disclosed which includes an interposer, at least one capacitor formed at least partially within an opening formed in the interposer and an...
US-9,142,420 Extensions of self-assembled structures to increased dimensions via a "bootstrap" self-templating method
Methods for fabricating sublithographic, nanoscale arrays of openings and linear microchannels utilizing self-assembling block copolymers, and films and devices...
US-9,142,314 Limiting flash memory over programming
Certain aspects of this disclosure relate to programming an at least one flash memory cell using an at least one programming pulse with a new programming...
US-9,142,264 Techniques for refreshing a semiconductor memory device
Techniques for refreshing a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor...
US-9,141,810 Architecture for virtual security module
A device supports the processing of multiple active applications in a processor through a mapping system that securely identifies and differentiates commands...
US-9,140,977 Imaging devices, methods of forming same, and methods of forming semiconductor device structures
An imaging device comprising a first region and a second region. Imaging features in the first region and assist features in the second region are substantially...
US-9,137,466 Image sensor defect identification using optical flare
Embodiments described herein may operate to compare an illuminance corresponding to a signal from an image sensor array (ISA) element in a production imaging...
US-9,136,472 Resistive memory and methods of processing resistive memory
Resistive memory and methods of processing resistive memory are described herein. One or more method embodiments of processing resistive memory include forming...
US-9,136,471 Forming resistive random access memories together with fuse arrays
A resistive random access memory array may be formed on the same substrate with a fuse array. The random access memory and the fuse array may use the same...
US-9,136,467 Phase change memory cells and methods of forming phase change memory cells
A phase change memory cell has first and second electrodes having phase change material there-between. The phase change memory cell is devoid of heater material...
US-9,136,331 Semiconductor constructions
Some embodiments include semiconductor constructions having semiconductor material patterned into two mesas spaced from one another by at least one dummy...
US-9,136,307 Memory cells and memory cell formation methods using sealing material
Memory cells, arrays of memory cells, and methods of forming the same with sealing material on sidewalls thereof are disclosed herein. One example of forming a...
US-9,136,306 Memory structures and arrays
Some embodiments include memory structures having a diode over a memory cell. The memory cell can include programmable material between a pair of electrodes,...
US-9,136,282 Memories and methods of forming thin-film transistors using hydrogen plasma doping
Methods of forming thin-film transistors and memories are disclosed. In one such method, polycrystalline silicon is hydrogen plasma doped to form doped...
US-9,136,278 Methods of forming vertically-stacked memory cells
Some embodiments include a method of fabricating integrated structures. A metal-containing material is formed over a stack of alternating first and second...
US-9,136,259 Method of creating alignment/centering guides for small diameter, high density through-wafer via die stacking
A method is provided for forming a die stack. The method includes forming a plurality of through-wafer vias and a first plurality of alignment features in a...
US-9,136,239 Interconnection designs and materials having improved strength and fatigue life
Methods and designs for increasing interconnect areas for interconnect bumps are disclosed. An interconnect bump may be formed on a substrate such that the...
US-9,136,128 Methods and apparatuses including memory cells with air gaps and other low dielectric constant materials
Various embodiments include apparatuses and methods of forming the same. One such apparatus can include a first dielectric material and a second dielectric...
US-9,136,017 Short-checking methods
In an embodiment, a short-checking method includes charging a data line to an initial voltage while activating a memory cell coupled to the data line, allowing...
US-9,135,998 Sense operation flags in a memory device
Memory devices, methods for programming sense flags, methods for sensing flags, and memory systems are disclosed. In one such memory device, the odd bit lines...
US-9,135,995 Methods of reading and using memristor memory cells with a short read pulse
Some embodiments include methods of reading memory cells. The memory cells have a write operation that occurs only if a voltage of sufficient absolute value is...
US-9,135,992 Methods for forming memory devices with reduced operational energy in phase change material
Methods of forming and operating phase change memory devices include adjusting an activation energy barrier between a metastable phase and a stable phase of a...
US-9,135,984 Apparatuses and methods for writing masked data to a buffer
Disclosed are apparatuses and methods for writing data to a memory array of a buffer. One such apparatus may include a multiplexer that receives data words and...
US-9,135,978 Memory programming methods and memory systems
Memory programming methods and memory systems are described. One example memory programming method includes programming a plurality of main cells of a main...
US-9,135,962 Comparators for delta-sigma modulators
Methods, systems and devices are disclosed, such as an electronic device that includes a plurality of data locations and a delta-sigma modulator. In some...
US-9,135,100 Cooperative memory error detection and repair
Some embodiments include apparatuses and methods having a memory structure included in a memory device and a control unit included in the memory device. The...
US-9,132,423 Sample-to-answer microfluidic cartridge
A microfluidic cartridge and methods for performing a diagnostic, molecular or biochemical assay thereon, where all dried and/or liquid reagents necessary for...
US-9,131,985 Medical treatment device
Provided is a medical treatment device capable of eliminating inconvenience of manipulation in actual clinical use, and ensuring a visual field by introducing a...
US-9,130,793 Constant delay zero standby differential logic receiver and method
A differential receiver circuit on an integrated circuit consumes substantially no standby power, has constant propagation delay regardless of the input common...
US-9,130,164 Resistive random access memory devices, and related semiconductor device structures
A method of forming a chalcogenide material on a surface of a substrate comprising exposing a surface of a substrate to ionized gas clusters from a source gas,...
US-9,130,163 Phase change memory structures and methods
A method of forming a phase change material memory cell includes forming a number of memory structure regions, wherein the memory structure regions include a...
US-9,130,157 Memory cells having a number of conductive diffusion barrier materials and manufacturing methods
Memory cells having a select device material located between a first electrode and a second electrode, a memory element located between the second electrode and...
US-9,129,983 Memory cells, memory arrays, methods of forming memory cells, and methods of forming a shared doped...
A memory cell includes a thyristor having a plurality of alternately doped, vertically superposed semiconductor regions; a vertically oriented access transistor...
US-9,129,961 Gallium lathanide oxide films
Electronic apparatus and methods of forming the electronic apparatus include a gallium lanthanide oxide film for use in a variety of electronic systems. The...
US-9,129,896 Arrays comprising vertically-oriented transistors, integrated circuitry comprising a conductive line buried in...
An array includes vertically-oriented transistors, rows of access lines, and columns of data/sense lines. Individual of the rows include an access line...
US-9,129,869 Pillar on pad interconnect structures, semiconductor devices including same and related methods
Methods of fabricating interconnect structures for semiconductor dice comprise forming conductive elements in contact with bond pads on an active surface over a...
US-9,129,862 Microelectronic devices and microelectronic support devices, and associated assemblies and methods
Microelectronic devices, associated assemblies, and associated methods are disclosed herein. For example, certain aspects of the invention are directed toward a...
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