Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: micron





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-9,032,145 Memory device and method having on-board address protection system for facilitating interface with multiple...
A memory device includes an address protection system that facilitates the ability of the memory device to interface with a plurality of processors operating in...
US-9,032,134 Methods of operating a memory system that include outputting a data pattern from a sector allocation table to a...
A method of operating a memory system includes receiving a read command from a host, where the read command is associated with a logical sector of a memory,...
US-9,030,902 Programming memory cells
Methods for programming memory cells. One such method for programming memory cells includes generating an encoded stream using a data stream and programming the...
US-9,030,895 Memory device with pin register to set input/output direction and bitwidth of data signals
A random access memory includes a data signal line, a data-synchronization signal line for a data synchronization signal which provides a synchronization signal...
US-9,030,884 Method and apparatus for pre-charging data lines in a memory cell array
Memories, pre-charge circuits, and methods for pre-charging memory are described. One such method includes providing a voltage to a data line and adjusting the...
US-9,030,882 Apparatuses and methods including memory array data line selection
Some embodiments include an apparatus having data lines coupled to memory cell strings and a selector configured to selectively couple one of the data lines to...
US-9,030,874 Adjusting program and erase voltages in a memory device
A system and apparatus for adjusting threshold program and erase voltages in a memory array, such as a floating gate memory array, for example. One such method...
US-9,030,870 Threshold voltage compensation in a multilevel memory
Threshold voltages in a charge storage memory are controlled by threshold voltage placement, such as to provide more reliable operation and to reduce the...
US-9,030,301 Systems and methods to determine kinematical parameters using RFID tags
Systems and methods to determine kinematical parameters of physical objects using radio frequency identification (RFID) tags attached to the objects. In one...
US-9,029,924 Antiblooming imaging apparatus, systems, and methods
Apparatus, systems, and methods are described to assist in reducing dark current in an active pixel sensor. In various embodiments, a potential barrier...
US-9,029,887 Solid state lighting devices having improved color uniformity and associated methods
Solid state lighting (SSL) devices and methods of manufacturing SSL devices are disclosed herein. In one embodiment, an SSL device comprises a support having a...
US-9,029,856 Methods of forming a metal telluride material, related methods of forming a semiconductor device structure, and...
Accordingly, a method of forming a metal chalcogenide material may comprise introducing at least one metal precursor and at least one chalcogen precursor into a...
US-9,029,826 Phase change memory including ovonic threshold switch with layered electrode and methods for forming the same
Erosion of chalcogenides in phase change memories using ovonic threshold switch selectors can be reduced by controlling columnar morphology in electrodes used...
US-9,029,257 Semiconductor constructions and methods of planarizing across a plurality of electrically conductive posts
Some embodiments include a planarization method. A liner is formed across a semiconductor substrate and along posts that extending upwardly from the substrate....
US-9,029,256 Charge-trap based memory
Methods of fabricating 3D charge-trap memory cells are described, along with apparatus and systems that include them. In a planar stack formed by alternate...
US-9,026,890 Memory with guard value dependent error correction
Embodiments of the present disclosure provide methods, systems, and apparatuses related to calculating an error correction code for a program page dependent on...
US-9,026,887 Physical page, logical page, and codeword correspondence
The present disclosure includes apparatuses and methods for physical page, logical page, and codeword correspondence. A number of methods include error coding a...
US-9,026,721 Managing defective areas of memory
Methods of operating a memory, and memories for performing such methods, include determining that a particular area of the memory is defective, locating a free...
US-9,026,485 Pattern-recognition processor with matching-data reporting module
Disclosed are methods and devices, among which is a device that includes a pattern-recognition processor. The pattern-recognition processor may include a...
US-9,025,407 Apparatus and methods to provide power management for memory devices
An apparatus, such as a nonvolatile solid-state memory device, may, in some implementations, include access line bias circuitry to set a bias level associated...
US-9,025,398 Metallization scheme for integrated circuit
For multi-level interconnect metallization, each metal level maintains a parallel line arrangement within a region, and the lines of each adjacent metal level...
US-9,025,392 Memory device with reduced neighbor memory cell disturbance
In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes a memory cell, digit line driver, access line driver, clamping...
US-9,025,388 Method for kink compensation in a memory
This disclosure concerns memory kink compensation. One method embodiment includes applying a number of sequentially incrementing programming pulses to a memory...
US-9,025,385 Voltage generation and adjustment in a memory device
Voltage generation devices and methods are useful in determining a data state of a selected memory cell in a memory device. Voltages can be generated in...
US-9,025,381 Block-row decoders, memory block-row decoders, memories, methods for deselecting a decoder of a memory and...
Block-row decoders, memory block-row decoders, memories, methods for deselecting a decoder of a memory and methods of selecting a block of memory are disclosed....
US-9,025,370 Cross-point memory devices, electronic systems including cross-point memory devices and methods of accessing a...
Memory devices comprise a plurality of memory cells, each memory cell including a memory element and a selection device. A plurality of first (e.g., row)...
US-9,025,364 Selective self-reference read
This disclosure relates to selectively performing a read with increased accuracy, such as a self-reference read, from a memory. In one aspect, data is read from...
US-9,024,290 Vertical transistor phase change memory
Vertical transistor phase change memory and methods of processing phase change memory are described herein. One or more methods include forming a dielectric on...
US-9,024,283 Horizontally oriented and vertically stacked memory cells
Horizontally oriented and vertically stacked memory cells are described herein. One or more method embodiments include forming a vertical stack having a first...
US-9,023,714 Methods of forming a plurality of covered voids in a semiconductor substrate
Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for...
US-9,023,711 Methods for forming a conductive material and methods for forming a conductive structure
A method of forming a conductive material comprises forming at least one opening extending through an organic material and an insulative material underlying the...
US-9,023,436 Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing...
Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces are...
US-9,021,176 Memory device and method with on-board cache system for facilitating interface with multiple processors, and...
A memory device includes an on-board cache system that facilitates the ability of the memory device to interface with a plurality of processors operating in a...
US-9,021,125 Control path I/O virtualisation
There is disclosed a data switch in combination with a proxy controller, the data switch being configured for routing data traffic and control traffic between...
US-9,019,788 Techniques for accessing memory cells
Techniques for accessing memory cells are disclosed. In one particular embodiment, the techniques may be realized as an apparatus providing voltage to a high...
US-9,019,785 Data shifting via a number of isolation devices
The present disclosure includes apparatuses and methods related to data shifting. An example apparatus comprises a first memory cell coupled to a first sense...
US-9,019,779 Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules
A layout for simultaneously sub-accessible memory modules is disclosed. In one embodiment, a memory module includes a printed circuit board having a plurality...
US-9,019,774 Method and system for minimizing number of programming pulses used to program rows of non-volatile memory cells
A flash memory device programs cells in each row in a manner that minimizes the number of programming pulses that must be applied to the cells during...
US-9,019,766 Biasing system and method
Embodiments are provided that include a memory system that includes a memory system, having an access device coupled between a global line and a local line and...
US-9,019,762 Methods of operating memory devices
Methods of operating a memory device include determining whether each memory cell selected for a sense operation has any data state of a first subset of data...
US-9,019,759 Techniques for providing a semiconductor memory device
Techniques for providing a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor...
US-9,019,754 State determination in resistance variable memory
An evaluation signal is applied to a memory cell in an array of resistance variable memory cells. The evaluation signal is configured to cause the memory cell...
US-9,018,751 Semiconductor module system having encapsulated through wire interconnect (TWI)
A semiconductor module system includes a module substrate and a semiconductor substrate having a through wire interconnect bonded to an electrode on the module...
US-9,018,059 Memory devices having reduced interference between floating gates and methods of fabricating such devices
A memory array comprising transistors having isolated inter-gate dielectric regions with respect to one another. Transistors are formed such that each of the...
US-9,015,935 Method for manufacturing probe card
A method for manufacturing a probe card includes inserting an attaching portion of each probe into one of first through holes provided on a probe substrate at...
US-9,015,934 Method for manufacturing probe card
A method for manufacturing a probe card prepares a plurality of probes, each having a metal layer on an attaching portion, and hot-melt material covering the...
US-9,015,440 Autonomous memory subsystem architecture
An autonomous sub-system receives a database downloaded from a host controller. A controller monitors bus traffic and/or allocated resources in the subsystem...
US-9,015,390 Active memory data compression system and method
An integrated circuit active memory device receives task commands from a component in a host computer system that may include the active memory device. The host...
US-9,015,356 Memory controllers, memory systems, solid state drives and methods for processing a number of commands
The present disclosure includes methods and devices for a memory controller. In one or more embodiments, a memory controller includes a plurality of back end...
US-9,014,318 Self-calibrating continuous-time equalization
Embodiments of the invention comprise a continuous-time equalizer for reducing ISI in data received from a communication channel, and methods and circuitry for...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.