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Patent # Description
US-9,059,261 Forming array contacts in semiconductor memories
Array contacts for semiconductor memories may be formed using a first set of parallel stripe masks and subsequently a second set of parallel stripe masks...
US-9,059,115 Methods of forming memory cells; and methods of forming vertical structures
Some embodiments include methods of forming memory. A series of photoresist features may be formed over a gate stack, and a placeholder may be formed at an end...
US-9,059,078 Covered void within a semiconductor substrate and method of forming a covered void within a semiconductor substrate
Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for...
US-9,059,030 Memory cells having capacitor dielectric directly against a transistor source/drain region
A memory cell includes a transistor device comprising a pair of source/drains, a body comprising a channel, and a gate construction operatively proximate the...
US-9,058,875 Resistive memory sensing
The present disclosure includes apparatuses and methods for sensing a resistive memory cell. A number of embodiments include performing a sensing operation on a...
US-9,058,857 Cross-point memory compensation
The apparatuses and methods described herein may operate to measure a voltage difference between a selected access line and a selected sense line associated...
US-9,058,491 Enabling a secure boot from non-volatile memory
A system may include a host that may include a processor coupled to a non-volatile memory over a secure communication protocol. As a result, prior to release...
US-9,058,465 Counter operation in a state machine lattice
Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may include a counter suitable for counting...
US-9,058,442 Incorporating noise and/or jitter into waveform generation
Methods and apparatus disclosed herein operate, for example, to derive a non-ideal received signal from an ideal signal, to compute, from the non-ideal received...
US-9,057,514 Solid state lights with thermosiphon liquid cooling structures and methods
A solid state lighting (SSL) device with a solid state emitter (SSE) being partially exposed in a channel loop, and methods of making and using such SSLs. The...
US-9,056,291 Microfluidic reactor system
A compact device for operatively coupling a solid planar substrate, for example a glass slide, to a microfluidic circuit and performing a reaction or reactions...
US-9,055,702 Method for forming a circuit board via structure for high speed signaling
One embodiment of the invention comprises an improved method for making a via structure for use in a printed circuit board (PCB). The via allows for the passage...
US-9,054,700 Apparatus and methods of driving signal for reducing the leakage current
Apparatus and methods for driving a signal are disclosed. An example apparatus includes a pre-driver circuit and a driver circuit. The pre-driver circuit...
US-9,054,675 Apparatuses and methods for adjusting a minimum forward path delay of a signal path
Apparatuses and methods related to adjusting a minimum forward path delay of a signal path are disclosed. One such signal path includes a signal path having a...
US-9,054,295 Phase change memory cells including nitrogenated carbon materials, methods of forming the same, and phase...
A phase change memory cell comprising a first chalcogenide compound on a first electrode, a first nitrogenated carbon material directly on the first...
US-9,054,235 Solid-state transducer devices with optically-transmissive carrier substrates and related systems, methods, and...
Semiconductor device assemblies having solid-state transducer (SST) devices and associated semiconductor devices, systems, and are disclosed herein. In one...
US-9,054,216 Methods of forming a vertical transistor
Trenches are formed into semiconductive material. Masking material is formed laterally over at least elevationally inner sidewall portions of the trenches....
US-9,054,165 Semiconductor devices including a through-substrate conductive member with an exposed end
Semiconductor devices and methods of manufacturing semiconductor devices. One example of a method of fabricating a semiconductor device comprises forming a...
US-9,054,099 Semiconductor device with copper wirebond sites and methods of making same
Semiconductor devices with external wirebond sites that include copper and methods for fabricating such semiconductor devices are disclosed. One embodiment of a...
US-9,054,030 Memory cells, semiconductor device structures, memory systems, and methods of fabrication
Memory cells are disclosed. Magnetic regions within the memory cells include an alternating structure of magnetic sub-regions and coupler sub-regions. The...
US-9,053,801 Memory cells having ferroelectric materials
Memory cells having ferroelectric materials and methods of operating and forming the same are described herein. As an example, a memory cell can include a first...
US-9,053,797 Inhibiting pillars in 3D memory devices
Methods and controllers for programming a memory are provided. In one such method, a potential for pillars of the memory that are to be inhibited is lowered,...
US-9,053,784 Apparatuses and methods for providing set and reset voltages at the same time
Apparatuses and methods are described, such as those involving driver circuits that are configured to provide reset and set voltages to different variable state...
US-9,053,779 Semiconductor device
A semiconductor device includes a first input terminal configured to receive a first clock signal, first control terminals configured to receive first control...
US-9,053,005 Recycled version number values in flash memory
Various embodiments include methods, apparatus, and systems for assigning a plurality of version number values to instances of a logical entity of a memory...
US-9,052,842 Logical unit operation
The present disclosure includes methods and devices for logical unit operation. One device embodiment includes a number of logical units, wherein each of the...
US-9,052,604 Photolithography systems and associated alignment correction methods
Several embodiments of photolithography systems and associated methods of alignment correction are disclosed herein. In one embodiment, a method for correcting...
US-9,048,856 Data bus inversion apparatus, systems, and methods
Apparatus, systems, and methods are disclosed such as those that operate to encode data bits transmitted on a plurality of channels according to at least one of...
US-9,048,819 Method and apparatus for detecting RF field strength
A method and apparatus for detecting RF field strength. A field strength reference generator develops a field strength reference current as a function of a...
US-9,048,415 Memory cells including top electrodes comprising metal silicide, apparatuses including such cells, and related...
Memory cells (e.g., CBRAM cells) include an ion source material over an active material and an electrode comprising metal silicide over the ion source material....
US-9,048,410 Memory devices comprising magnetic tracks individually comprising a plurality of magnetic domains having domain...
A method of forming a memory device having magnetic tracks individually comprising a plurality of magnetic domains having domain walls, includes forming an...
US-9,048,337 Vertical transistor, memory cell, device, system and method of forming same
A memory device, system and fabrication method relating to a vertical memory cell including a semiconducting pillar extending outwardly from an integrally...
US-9,048,292 Patterning methods and methods of forming electrically conductive lines
Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the...
US-9,048,194 Method for selectively modifying spacing between pitch multiplied structures
Methods for circuit material processing are provided. In at least one such method, a substrate is provided with a plurality of overlying spacers. The spacers...
US-9,048,131 Apparatus and methods relating to a memory cell having a floating body
An apparatus is disclosed for a memory cell having a floating body. A memory cell may include a transistor over an insulation layer, the transistor including a...
US-9,047,991 Methods, apparatus, and systems to repair memory
Methods, apparatus and systems pertain to performing READ, WRITE functions in a memory which is coupled to a repair controller. One such repair controller could...
US-9,047,978 Apparatuses and methods for selective row refreshes
Apparatuses and methods for selective row refreshes are disclosed herein. An example apparatus may include a refresh control circuit. The refresh control...
US-9,047,972 Methods, devices, and systems for data sensing
Methods, devices, and systems for data sensing in a memory system can include performing a number of successive sense operations on a number of memory cells...
US-9,047,944 Resistance variable memory sensing
The present disclosure includes apparatuses and methods for sensing a resistance variable memory cell. A number of embodiments include programming a memory cell...
US-9,047,523 Systems and methods using single antenna for multiple resonant frequency ranges
A radio frequency device utilizing an antenna having a single antenna structure resonant on multiple resonant frequency ranges. The antenna can be configured to...
US-9,047,425 Time-domain signal generation
Methods and apparatus disclosed herein operate to receive a plurality of cycles characterized by a set of time-domain aspects, to modify at least one of the...
US-9,047,273 Data transfer management
Methods, controllers, and systems for managing data transfer, such as those in solid state drives (SSDs), are described. In some embodiments, the data transfer...
US-9,047,191 Error control in memory storage systems
A method includes calculating a first syndrome of a codeword read from a memory location under a first set of conditions and calculating a second syndrome of...
US-9,046,649 Communication methods, methods of forming an interconnect, signal interconnects, integrated circuit structures,...
Some embodiments include communication methods, methods of forming an interconnect, signal interconnects, integrated circuit structures, circuits, and data...
US-9,044,692 Systems and methods for water desalinization
An apparatus includes a set of atomizers, a housing and a separator. Each atomizer includes an inlet portion that receives an inlet flow of a solution and an...
US-9,043,661 Memories and methods for performing column repair
Memory devices adapted to repair single unprogrammable cells during a program operation, and to repair columns containing unprogrammable cells during a...
US-9,043,578 Apparatuses and methods for providing data from multiple memories
Apparatuses and methods for providing data are disclosed. An example apparatus includes a plurality of memories coupled to a data bus. The memories provide data...
US-9,043,518 Method and apparatus for calibrating a memory interface with a number of data patterns
Apparatuses and methods of calibrating a memory interface are described. Calibrating a memory interface can include loading and outputting units of a first data...
US-9,043,506 Host controller
The present disclosure includes methods, devices, and systems for controlling a memory device. One method for controlling a memory device embodiment includes...
US-9,042,697 Resonator for thermo optic device
A resonator for thermo optic devices is formed in the same process steps as a waveguide and is formed in a depression of a lower cladding while the waveguide is...
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