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Patent # Description
US-8,946,873 Redistribution structures for microfeature workpieces
Microfeature dies with redistribution structures that reduce or eliminate line interference are disclosed. The microfeature dies can include a substrate having...
US-8,946,815 Floating body transistor constructions, semiconductor constructions, and methods of forming semiconductor...
The invention includes floating body transistor constructions containing U-shaped semiconductor material slices. The U-shapes have a pair of prongs joined to a...
US-8,946,807 3D memory
Three-dimensional memory cells and methods of making and using the memory cells are discussed generally herein. In one or more embodiments, a three-dimensional...
US-8,946,086 Methods of forming patterns, and methods of forming integrated circuitry
Some embodiments include methods of forming a pattern. First lines are formed over a first material, and second lines are formed over the first lines. The first...
US-8,946,076 Methods of fabricating integrated structures, and methods of forming vertically-stacked memory cells
Some embodiments include methods of forming vertically-stacked memory cells. An opening is formed to extend partially through a stack of alternating...
US-8,946,043 Methods of forming capacitors
A method of forming capacitors includes forming support material over a substrate. A first capacitor electrode is formed within individual openings in the...
US-8,946,018 Methods of forming memory arrays and semiconductor constructions
Some embodiments include methods of forming semiconductor constructions. A heavily-doped region is formed within a first semiconductor material, and a second...
US-8,945,996 Methods of forming circuitry components and methods of forming an array of memory cells
A method of forming circuitry components includes forming a stack of horizontally extending and vertically overlapping features. The stack has a primary portion...
US-8,945,950 STT-MRAM cell structures
A magnetic cell structure including a nonmagnetic bridge, and methods of fabricating the structure are provided. The magnetic cell structure includes a free...
US-8,945,700 Polymeric materials in self-assembled arrays and semiconductor structures comprising polymeric materials
Methods for fabricating sublithographic, nanoscale microstructures in line arrays utilizing self-assembling block copolymers, and films and devices formed from...
US-8,945,403 Material test structure
Material test structures having cantilever portions and methods of forming the same are described herein. As an example, a method of forming a material test...
US-8,945,305 Methods of selectively forming a material using parylene coating
Methods for depositing a material, such as a metal or a transition metal oxide, using an ALD (atomic layer deposition) process and resulting structures are...
US-8,943,387 Programming management data for a memory
Methods, apparatus, systems, and data structures may operate to combine block management data with a portion of data, to generate error correction data for the...
US-8,943,298 Meta predictor restoration upon detecting misprediction
Methods and apparatus for restoring a meta predictor system upon detecting a branch or binary misprediction, are disclosed. An example apparatus may include a...
US-8,942,054 Systems, memories, and methods for operating memory arrays
Memories, systems, and methods for refreshing are provided, such as a memory with an array of memory cells divided into sections. Memories include replacement...
US-8,942,045 Memory apparatus and methods
Embodiments of apparatus and methods having a memory device can include a line to exchange information with a string of memory cells and a transistor coupled...
US-8,941,171 Flatband voltage adjustment in a semiconductor device
Memory devices, methods for fabricating, and methods for adjusting flatband voltages are disclosed. In one such memory device, a pair of source/drain regions...
US-8,940,592 Memories and methods of forming thin-film transistors using hydrogen plasma doping
Methods of forming thin-film transistors and memories are disclosed. In one such method, polycrystalline silicon is hydrogen plasma doped to form doped...
US-8,940,581 Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a packaged...
US-8,940,388 Insulative elements
Methods of forming an insulative element are described, including forming a first metal oxide material having a first dielectric constant, forming a second...
US-8,940,102 Methods of removing particles from over semiconductor substrates
Some embodiments include methods of removing particles from over surfaces of semiconductor substrates. Liquid may be flowed across the surfaces and the...
US-8,938,657 Data and error correction code mixing device and method
Memory devices and methods are described such as those that mix data and associated error correction code blocks between multiple memory device locations....
US-8,938,630 Apparatus power control
The present disclosure includes apparatuses and methods for apparatus power control. A number of embodiments include determining a power profile for each of a...
US-8,938,590 Indirect register access method and system
Systems and methods are provided for managing access to registers. In one embodiment, a system may include a processor and a plurality of registers. The...
US-8,938,376 Simulating the transmission and simultaneous switching output noise of signals in a computer system
Methods implementable in a computer system for simulating the transmission of signals across a plurality of data channels (bus) are disclosed. The disclosed...
US-8,937,839 Data paths using a first signal to capture data and a second signal to output data and methods for providing data
Data paths, memories, and methods for providing data from memory are disclosed. An example read data path includes a delay path, and a clocked data register....
US-8,937,836 Line voltage boost system and method for non-volatile memory devices and memory devices and processor-based...
The voltage of a selected word line is increased beyond the voltage to which a respective string driver transistor is capable of driving the word line by...
US-8,937,309 Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication
Methods of fabricating multi-die assemblies including a base semiconductor die bearing a peripherally encapsulated stack of semiconductor dice of lesser lateral...
US-8,937,290 Memory cells
Some embodiments include memory cells. A memory cell may contain a switching region and an ion source region between a pair of electrodes. The switching region...
US-8,937,018 Methods of forming a pattern on a substrate
A method of forming a pattern on a substrate includes forming spaced, upwardly-open, cylinder-like structures projecting longitudinally outward of a base....
US-8,936,991 Methods of forming capacitors and semiconductor devices including a rutile titanium dioxide material
Methods of forming a capacitor including forming a titanium nitride material within at least one aperture defined by a support material, forming a ruthenium...
US-8,936,953 Light emitting diode thermally enhanced cavity package and method of manufacture
Several embodiments of light emitting diode packaging configurations including a substrate with a cavity are disclosed herein. In one embodiment, a cavity is...
US-8,936,702 System and method for sputtering a tensile silicon nitride film
There is provided a system and method for sputtering a tensile silicon nitride film. More specifically, in one embodiment, there is provided a method comprising...
US-8,934,310 Bitline for memory
Subject matter disclosed herein relates to accessing memory, and more particularly to operation of a partitioned bitline.
US-8,934,306 Memory and sense parameter determination methods
Memory devices and methods for operating a memory include filtering a histogram of sensed data of the memory, and adjusting a parameter used to sense the memory...
US-8,934,297 Method and system for programming non-volatile memory cells based on programming of proximate memory cells
A multi-level non-volatile memory device programs cells in each row in a manner that takes into account the coupling from the programming of cells that are...
US-8,934,035 Correction of non-uniform sensitivity in an image array
An improved non-uniform sensitivity correction algorithm for use in an imager device (e.g., a CMOS APS). The algorithm provides zones having flexible boundaries...
US-8,933,508 Memory with isolation structure
A recessed transistor construction is formed between a first access transistor construction and a second access transistor construction to provide isolation...
US-8,933,491 Arrays of memory cells and methods of forming an array of vertically stacked tiers of memory cells
An array of vertically stacked tiers of memory cells includes a plurality of horizontally oriented access lines within individual tiers of memory cells and a...
US-8,933,449 Apparatus having a dielectric containing scandium and gadolinium
Apparatus having a dielectric containing scandium and gadolinium can provide a reliable structure with a high dielectric constant (high k). In an embodiment, a...
US-8,932,960 Methods for isolating portions of a loop of pitch-multiplied material and related structures
Different portions of a continuous loop of semiconductor material are electrically isolated from one another. In some embodiments, the end of the loop is...
US-8,932,935 Forming three dimensional isolation structures
A three dimensional shallow trench isolation structure including sets of parallel trenches extending in two perpendicular directions may be formed by depositing...
US-8,932,933 Methods of forming hydrophobic surfaces on semiconductor device structures, methods of forming semiconductor...
A method of forming a hydrophobic surface on a semiconductor device structure. The method comprises forming at least one structure having at least one exposed...
US-8,931,169 Methods of fabricating components for microelectronic devices
Methods of fabricating components for microelectronic devices are described herein. For example, one embodiment is directed toward a method of fabricating a...
US-8,930,786 Self-timed error correcting code evaluation system and method
Error correcting codes (ECCs) have been proposed to be used in high frequency memory devices to detect errors in signals transmitted between a memory controller...
US-8,930,771 Systems and methods for retrieving data
Apparatus and methods, such as those that read data from non-volatile integrated circuit memory devices, such as NAND flash. For example, disclosed techniques...
US-8,930,711 Critical security parameter generation and exchange system and method for smart-card memory modules
A storage device contains a smart-card device and a memory device, which is connected to a controller. The storage device may be used in the same manner as a...
US-8,930,671 Logical address offset in response to detecting a memory formatting operation
The present disclosure includes methods, devices, and systems for a logical address offset. One method embodiment includes detecting a memory unit formatting...
US-8,930,645 Method and apparatus using linked lists for streaming of data for soild-state bulk storage device
Methods and apparatus facilitate data streaming in bulk storage devices by generating linked lists containing entries for both user data and metadata. These...
US-8,930,643 Multi-port memory and operation
Multi-port memory having an additional control bus for passing commands between ports have individual ports that can be configured to respond to a command...
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