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Patent # Description
US-8,902,653 Memory devices and configuration methods for a memory device
Memory devices and methods of operating memory devices are disclosed. In one such method, different blocks of memory cells have different configurations of user...
US-8,902,650 Memory devices and operating methods for a memory device
Devices and methods facilitate memory device operation in all bit line architecture memory devices. In at least one embodiment, memory cells comprising...
US-8,902,648 Dynamic program window determination in a memory device
Methods for determining a program window and memory devices are disclosed. One such method for determining the program window measures an amount of program...
US-8,902,639 Cross-point memory cells, non-volatile memory arrays, methods of reading a memory cell, methods of programming...
Cross-point memory cells, non-volatile memory arrays, methods of reading a memory cell, methods of programming a memory cell, and methods of writing to and...
US-8,901,700 Semiconductor structures
Methods of pitch doubling of asymmetric features and semiconductor structures including the same are disclosed. In one embodiment, a single photolithography...
US-8,901,666 Semiconducting graphene structures, methods of forming such structures and semiconductor devices including such...
A semiconducting graphene structure may include a graphene material and a graphene-lattice matching material over at least a portion of the graphene material,...
US-8,901,625 Methods of making JFET devices with pin gate stacks
Devices and methods for providing JFET transistors with improved operating characteristics are provided. Specifically, one or more embodiments of the present...
US-8,900,992 Methods of forming a ruthenium material, methods of forming a capacitor, and related electronic systems
Methods for forming ruthenium films and semiconductor devices, such as capacitors, that include the films are provided.
US-8,900,963 Methods of forming semiconductor device structures, and related structures
A method of forming a semiconductor device structure. The method comprises forming a block copolymer assembly comprising at least two different domains over an...
US-8,900,946 Method of forming layers using atomic layer deposition
Nanocrystal structures formed using atomic layer deposition (ALD) processes are useful in the formation of integrated circuits such as memory devices. Rather...
US-8,900,945 Method of forming a memory device
A front-end method of fabricating nickel plated caps over copper bond pads used in a memory device. The method provides protection of the bond pads from an...
US-8,900,923 Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
Packaged microelectronic devices and methods of manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a method of...
US-8,589,826 Photomask constructions having liners of specified compositions along sidewalls of multi-layered structures
Some embodiments include methods in which a mathematical representation of a photomask construction is defined, with such representation comprising a plurality...
US-8,589,761 Apparatus and methods for providing data integrity
The present disclosure includes apparatus (e.g., computing systems, memory systems, controllers, etc.) and methods for providing data integrity. One or more...
US-8,589,641 Combined parallel/serial status register read
Methods and devices are disclosed, such as those involving a solid state memory device that includes a status register configured to be read with a combined...
US-8,589,129 Time-domain signal generation
Methods and apparatus disclosed herein operate to receive a plurality of cycles characterized by a set of time-domain aspects, to modify at least one of the...
US-8,588,022 Memory refresh methods, memory section control circuits, and apparatuses
Apparatuses, memory section control circuits, and methods of refreshing memory are disclosed. An example apparatus includes a plurality of memory sections and a...
US-8,588,007 Leakage measurement systems
Described examples include leakage measurement systems and methods for measuring leakage current between a word line at a boosted voltage and a word line at a...
US-8,587,996 Techniques for providing a direct injection semiconductor memory device
Techniques for providing a direct injection semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as...
US-8,587,984 Sensing resistance variable memory
The present disclosure includes devices and methods for operating resistance variable memory. One device embodiment includes an array of memory cells wherein a...
US-8,587,981 Memory, computing system and method for checkpointing
Embodiments of the present invention provide local checkpoint memories that are closely coupled to the processor of a computing system used during normal...
US-8,587,354 Control of a variable delay line using line entry point to modify line power supply voltage
Disclosed herein is a VDL/DLL architecture in which the power supply to the VDL, VccVDL, is regulated at least as a function of the entry point of the input...
US-8,587,340 Apparatuses including scalable drivers and methods
Apparatuses and methods are described that include a plurality of drivers corresponding to a single via. A number of drivers can be selected to operate...
US-8,587,109 Stacked microelectronic dies and methods for stacking microelectronic dies
An assembly of microelectronic devices and method for forming an assembly of microelectronic devices. In one embodiment, an assembly comprises a support member...
US-8,586,483 Semiconductor device structures and compositions for forming same
A method of removing a metal nitride material is disclosed. The method comprises forming a semiconductor device structure comprising an exposed metal material...
US-8,586,429 Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors,...
A method of forming a series of spaced trenches into a substrate includes forming a plurality of spaced lines over a substrate. Anisotropically etched sidewall...
US-8,585,915 Methods for fabricating sub-resolution alignment marks on semiconductor structures
A method of fabricating semiconductor structures comprising sub-resolution alignment marks is disclosed. The method comprises forming a dielectric material on a...
US-8,584,058 Methods for defining evaluation points for optical proximity correction and optical proximity correction...
Methods are disclosed for defining evaluation points for use in optical proximity correction of a rectangular target geometry. A method for defining evaluation...
US-8,583,987 Method and apparatus to perform concurrent read and write memory operations
Subject matter disclosed herein relates to read and write processes of a memory device. During a write process to a particular partition in a memory array, a...
US-8,583,870 Stacked memory devices, systems, and methods
Memory requests for information from a processor are received in an interface device, and the interface device is coupled to a stack including two or more...
US-8,582,390 Wordline voltage transfer apparatus, systems, and methods
The apparatus and systems described herein may comprise a plurality of memory cells coupled to a local wordline, and a wordline drive circuit that includes a...
US-8,582,380 Systems, circuits, and methods for charge sharing
Systems, circuits, and methods are disclosed for charge sharing. In one such example system, a first line is configured to be driven to a first voltage...
US-8,582,377 Redundant memory array for replacing memory sections of main memory
Memories and methods for replacing memory sections of a main memory array by mapping memory addresses for an entire main memory section to at least one memory...
US-8,582,375 Methods for sensing memory elements in semiconductor devices
A memory device that, in certain embodiments, includes a plurality of memory elements connected to a bit-line and a delta-sigma modulator with a digital output...
US-8,582,373 Buffer die in stacks of memory dies and methods
Memory devices and methods of making and operating them are shown. Memory devices shown include stacked memory dies with one or more buffer dies included. In...
US-8,582,364 Fast programming memory device
In an embodiment of a memory device including a matrix of memory cells wherein the memory cells are arranged in a plurality of memory cells strings each one...
US-8,582,357 Reducing effects of program disturb in a memory device
The programming disturb effects in a semiconductor non-volatile memory device can be mitigated by biasing unselected memory cells with a negative voltage while...
US-8,582,356 Providing a ready-busy signal from a non-volatile memory device to a memory controller
A common standard may be used for both dynamic random access memories and non volatile memories, despite the fact that the non-volatile memory generally needs...
US-8,582,350 Capacitor-less memory cell, device, system and method of making same
A capacitor-less memory cell, memory device, system and process of forming the capacitor-less memory cell includes forming the memory cell in an active area of...
US-8,582,005 Method, apparatus and system providing adjustment of pixel defect map
A method, apparatus and system that allows for the identification of defective pixels, for example, defective pixel clusters, in an imager device. The method,...
US-8,581,651 Duty cycle based phase interpolators and methods for use
Duty cycle based phase interpolators, and methods for implementing duty cycle based phase interpolators are disclosed. One such phase interpolator includes a...
US-8,581,630 Signal driver circuit having adjustable output voltage for a high logic level output signal
A signal driver circuit having an adjustable output voltage for a high-logic level output signal. The signal driver circuit includes a signal driver configured...
US-8,581,387 Through wire interconnect (TWI) having bonded connection and encapsulating polymer layer
A through wire interconnect for a semiconductor substrate includes a via extending through the semiconductor substrate from a first side to a second side...
US-8,581,352 Electronic devices including barium strontium titanium oxide films
Apparatus and methods of forming the apparatus include a dielectric layer containing barium strontium titanium oxide layer, an erbium-doped barium strontium...
US-8,581,224 Memory cells
Some embodiments include memory cells which contain, in order; a first electrode material, a first metal oxide material, a second metal oxide material, and a...
US-8,580,666 Methods of forming conductive contacts
Methods for forming memory devices and integrated circuitry, for example, DRAM (dynamic random access memory) circuitry, structures and devices resulting from...
US-8,580,645 Memory devices and methods of forming memory devices
Disclosed is a method of forming memory devices employing halogen ion implantation and diffusion processes. In one illustrative embodiment, the method includes...
US-8,580,593 Epitaxial formation structures and associated methods of manufacturing solid state lighting devices
Epitaxial formation structures and associated methods of manufacturing solid state lighting ("SSL") devices with target thermal expansion characteristics are...
US-8,580,158 Methods of removing silicon dioxide
Some embodiments include methods of removing silicon dioxide in which the silicon dioxide is exposed to a mixture that includes activated hydrogen and at least...
US-8,578,591 Method for manufacturing a stacked device conductive path connectivity
Various embodiments include apparatus and methods having circuitry to test continuity of conductive paths coupled to dice arranged in a stack. In at least one...
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