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Patent # Description
US-1,001,4347 Arrays of memory cells and methods of forming an array of memory cells
An array of memory cells includes buried access lines having conductively doped semiconductor material. Pillars extend elevationally outward of and are spaced...
US-1,001,4345 Magnetic memory device with grid-shaped common source plate, system, and method of fabrication
Magnetic memory devices include an array of magnetic memory cells including magnetic tunnel junction regions. The array of magnetic memory cells includes access...
US-1,001,4319 Conductive components and memory assemblies
Some embodiments include a memory assembly having memory cells proximate a conductive source. Channel material extends along the memory cells and is...
US-1,001,4311 Methods of forming an array of elevationally-extending strings of memory cells, methods of forming polysilicon,...
A method of forming poly silicon comprises forming a first polysilicon-comprising material over a substrate, with the first polysilicon-comprising material...
US-1,001,4309 Methods of forming an array of elevationally-extending strings of memory cells comprising a programmable charge...
An array of elevationally-extending strings of memory cells, where the memory cells individually comprise a programmable charge storage transistor, comprises a...
US-1,001,4305 Methods of forming an array comprising pairs of vertically opposed capacitors and arrays comprising pairs of...
A method of forming an array comprising pairs of vertically opposed capacitors comprises forming a conductive lining in individual capacitor openings in...
US-1,001,4302 Methods of forming memory arrays
Some embodiments include a method of forming a memory array. A wordline is formed to extend along a first direction, and along a rail of semiconductor material....
US-1,001,4301 Semiconductor constructions
Some embodiments include methods in which a pair of spaced-apart adjacent features is formed over a substrate. The features have silicon dioxide surfaces....
US-1,001,4281 Methods of manufacturing a semiconductor device package including a controller element
Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a...
US-1,001,4211 Methods of forming one or more covered voids in a semiconductor substrate
Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for...
US-1,001,4115 Apparatuses, multi-chip modules and capacitive chips
Some embodiments include a capacitive chip having a plurality of capacitive units. The individual capacitive units include alternating electrode layers and...
US-1,001,4070 Data path integrity verification in memory devices
Methods and memories for verifying data path integrity are provided. In one such method, a first set of data are read from a first register of a memory device...
US-1,001,4062 Apparatus and methods for determining a pass/fail condition of a memory device
Memory devices including an array of memory cells, a first buffer selectively connected to the array of memory cells and corresponding to a particular bit rank...
US-1,001,4061 Methods and apparatus having multiple select gates of different ranges of threshold voltages connected in...
Apparatus having a plurality of strings of series-connected memory cells, and methods of their operation, where each of the strings of series-connected memory...
US-1,001,4057 Devices including memory arrays, row decoder circuitries and column decoder circuitries
Some embodiments include a device having an array of memory cells, a memory control unit at least partially under the array, row decoder circuitry in data...
US-1,001,4053 Methods for backup sequence using three transistor memory cell devices
Methods for a backup sequence includes reading first data from a first data memory to a page buffer, copying the first data from the page buffer to a backup...
US-1,001,4051 Data storage with data randomizer in multiple operating modes
Methods of operating a memory include programming a particular portion of a data state to a memory cell with a data randomizer in a first operating mode, and...
US-1,001,4038 Apparatuses and methods for chip identification in a memory package
Apparatuses, methods, memory packages, and semiconductor chips are disclosed. An example apparatus includes a semiconductor chip including a layer...
US-1,001,4034 Shifting data in sensing circuitry
The present disclosure is related to shifting data using sensing circuitry. An example apparatus can include a first sensing component and a second sensing...
US-1,001,4033 Apparatus for power management
Apparatus include an array of memory cells, a controller to perform access operations on the array of memory cells, a clock signal node, a counter having an...
US-1,001,3197 Shift skip
The present disclosure includes apparatuses and methods related to a shift skip. An example apparatus comprises a plurality of sensing circuitries, comprising...
US-1,001,2485 Integrated burst disc for high/low propulsion ordnance
A rupture mechanism is integrated into a plastic casing used for low velocity projectile rounds. The casing incorporates a cylindrical wall having a top mouth...
US-1,001,0977 Systems and methods for forming apertures in microfeature workpieces
Systems and methods for forming apertures in microfeature workpieces are disclosed herein. In one embodiment, a method includes directing a laser beam toward a...
US-1,000,8461 Semiconductor structure having a patterned surface structure and semiconductor chips including such structures
A connector structure and a manufacturing method thereof are provided. The connector structure includes a semiconductor substrate, a metal layer, a passivation...
US-1,000,8254 Apparatus having dice to perorm refresh operations
Some embodiments include an apparatus that comprise an interface chip having an oscillator to produce an original clock signal, a first memory chip having first...
US-1,000,5308 Stamps and methods of forming a pattern on a substrate
Methods for fabricating stamps and systems for patterning a substrate, and devices resulting from those methods are provided.
US-9,997,662 Light-emitting metal-oxide-semiconductor devices and associated systems, devices, and methods
Various embodiments of solid state transducer ("SST") devices are disclosed. In several embodiments, a light emitter device includes a metal-oxide-semiconductor...
US-9,997,592 Capacitor, array of capacitors, and device comprising an electrode
A capacitor includes an elevationally inner capacitor electrode, an elevationally outer capacitor electrode, and capacitor insulator between the elevationally...
US-9,997,461 Electrically conductive laminate structures
Some embodiments include electrical interconnects. The interconnects may contain laminate structures having a graphene region sandwiched between non-graphene...
US-9,997,452 Forming conductive plugs for memory device
Apparatuses and methods with conductive plugs for a memory device are described. An example method includes: forming a plurality of shallow trench isolations...
US-9,997,398 Methods of forming one or more covered voids in a semiconductor substrate
Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for...
US-9,997,247 Memory devices having source lines directly coupled to body regions and methods
Memory devices, memory cell strings and methods of operating memory devices are shown. Configurations described include directly coupling an elongated body...
US-9,997,246 Memory devices and their operation having trim registers associated with access operation commands
Methods including performing an access operation on a memory device using trims corresponding to trim settings, receiving a command to suspend the access...
US-9,997,232 Processing in memory (PIM) capable memory device having sensing circuitry performing logic operations
Apparatuses and methods are provided for logic/memory devices. An example apparatus comprises a plurality of memory components adjacent to and coupled to one...
US-9,997,220 Apparatuses and methods for adjusting delay of command signal path
Apparatuses and methods related to adjusting a delay of a command signal path are disclosed. An example apparatus includes: a timing circuit that includes a...
US-9,997,212 Accessing data in memory
The present disclosure includes apparatuses and methods related to accessing data in memory. One example method comprises storing data associated with a first...
US-9,996,496 Devices, systems, and methods of reducing chip select
Several systems and methods of chip select are described. In one such method, a device maintains two identifiers, (ID_a and ID_m). When the device receives a...
US-9,996,479 Encryption of executables in computational memory
The present disclosure is related to encryption of executables in computational memory. Computational memory can traverse an operating system page table in the...
US-9,991,331 Apparatuses and methods for semiconductor circuit layout
Apparatuses including compensation capacitors are described. An example apparatus includes: first, second and third capacitors arranged such that the second...
US-9,991,273 Floating gate memory cells in vertical memory
Floating gate memory cells in vertical memory. A control gate is formed between a first tier of dielectric material and a second tier of dielectric material. A...
US-9,991,210 Electromagnetic shield and associated methods
Semiconductor devices are described, along with methods and systems that include them. One such device includes a diffusion region in a semiconductor material,...
US-9,991,122 Methods of forming semiconductor device structures including two-dimensional material structures
A method of forming a semiconductor device structure comprises forming at least one 2D material over a substrate. The at least one 2D material is treated with...
US-9,990,995 Systems having a resistive memory device
Systems having a resistive memory device having control circuitry configured to build a data word from remapped data bits from a received data word such that...
US-9,990,994 Methods of programming memories having a shared resistance variable material
Methods for programming data to an array of memory cells having a first memory cell, a second memory cell that is adjacent to the first memory cell in a first...
US-9,990,990 Apparatuses and methods for accessing variable resistance memory device
The disclosed technology generally relates to memory apparatuses and methods of operating the same, and more particularly to a memory device having a controller...
US-9,990,989 Enhancing nucleation in phase-change memory cells
Various embodiments disclosed herein comprise methods and apparatuses for placing phase-change memory (PCM) cells of a memory array into a temperature regime...
US-9,990,988 Determining whether a memory cell state is in a valley between adjacent data states
A determination can be made as to whether a state of a memory cell is in a valley between adjacent distributions of states associated with respective data...
US-9,990,977 Power reduction for a sensing operation of a memory cell
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A memory device may leverage non-volatile memory properties of a...
US-9,990,971 Devices, methods, and systems supporting on unit termination
The present disclosure includes devices, methods, and systems supporting on unit termination. A number of embodiments include a number of memory units, wherein...
US-9,990,967 Apparatuses and methods for performing corner turn operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing corner turn operations using sensing circuitry. An example apparatus comprises a...
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