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Patent # Description
US-8,198,717 Signal shifting to allow independent control of identical stacked memory modules
A memory device having die-stacking modules that are interchangeable within a Package-on-Package (PoP) and provide separate Chip Enable (CE) signals for all...
US-8,198,711 Lead frame
A lead frame includes a plurality of leads electrically connected to a semiconductor chip and a lead lock including a base layer disposed over the plurality of...
US-8,198,172 Methods of forming integrated circuits using donor and acceptor substrates
Methods for fabricating integrated circuit devices on an acceptor substrate devoid of circuitry are disclosed. Integrated circuit devices are formed by...
US-8,198,129 Methods of depositing antimony-comprising phase change material onto a substrate and methods of forming phase...
A method of depositing an antimony-comprising phase change material onto a substrate includes providing a reducing agent and vaporized Sb(OR).sub.3 to a...
US-8,198,124 Methods of self-aligned growth of chalcogenide memory access device
Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming...
US-8,195,920 Active memory command engine and method
A command engine for an active memory receives high level tasks from a host and generates corresponding sets of either DCU commands to a DRAM control unit or...
US-8,195,899 Memory cell operation
The present disclosure includes memory devices and systems having memory cells, as well as methods for operating the memory cells. One or more methods for...
US-8,195,020 Resonator for thermo optic device
A resonator for thermo optic devices is formed in the same process steps as a waveguide and is formed in a depression of a lower cladding while the waveguide is...
US-8,194,487 Refreshing data of memory cells with electrically floating body transistors
A semiconductor device along with circuits including the same and methods of operating the same are described. The device comprises a memory cell including one...
US-8,194,477 Subtraction circuits and digital-to-analog converters for semiconductor devices
A memory device that, in certain embodiments, includes a plurality of memory elements connected to a bit-line and a delta-sigma modulator with a digital output...
US-8,194,475 Capacitive divider sensing of memory cells
The present disclosure includes devices and methods for sensing resistance variable memory cells. One device embodiment includes at least one resistance...
US-8,194,474 Data bus power-reduced semiconductor storage apparatus
In one or more of the disclosed embodiments, the number of times toggle operations of a data bus are performed at the time of a data transmission in a...
US-8,194,466 Charge pump operation in a non-volatile memory device
A charge pump in a memory device is activated to produce a programming voltage prior to data loading during a programming operation. During an initial...
US-8,194,460 Charge loss compensation during programming of a memory device
A selected memory cell on a selected word line is programmed through a plurality of programming pulses that are incremented by a step voltage. After a...
US-8,194,459 Random telegraph signal noise reduction scheme for semiconductor memories
Embodiments are provided that include a method including providing a first pulsed gate signal to a selected memory cell, wherein the pulsed gate signal...
US-8,194,458 Programming and/or erasing a memory device in response to its program and/or erase history
For one embodiment, a program starting voltage of one or more program pulses applied to one or more memory cells is in response, at least in part, to on a...
US-8,194,450 Methods and control circuitry for programming memory cells
Methods of programming memory cells and control circuitry for memory arrays facilitate a reduction of program disturb. A memory cell is shifted from a first...
US-8,194,446 Methods for programming a memory device and memory devices using inhibit voltages that are less than a supply...
Methods for programming a memory array and memory devices are disclosed. In one such method, inhibited bit lines are charged to an inhibit voltage that is less...
US-8,194,441 Phase change memory state determination using threshold edge detection
Subject matter disclosed herein relates to techniques to read a memory cell that involve a threshold edge phenomenon of a reset state of phase change memory.
US-8,193,849 Generating a full rail signal
Apparatus, systems, and methods are disclosed, such as those that comprise a center-swing signal generator that includes a push-pull center-swing driver coupled...
US-8,193,646 Semiconductor component having through wire interconnect (TWI) with compressed wire
A semiconductor component includes a semiconductor substrate having a substrate contact, and a through wire interconnect (TWI) bonded to the substrate contact....
US-8,193,607 Memory cell having GeN-containing material and variable resistance material embedded within insulating material
A variable resistance memory cell structure and a method of forming it. The method includes forming a first electrode, forming an insulating material over the...
US-8,193,590 Interconnecting bit lines in memory devices for multiplexing
An embodiment of a memory device has a plurality of conductive plugs formed on a semiconductor substrate and a pair of successively adjacent first and second...
US-8,193,568 Nanocrystal based universal memory cells, and memory cells
Some embodiments include memory cells that contain a dynamic random access memory (DRAM) element and a nonvolatile memory (NVM) element. The DRAM element...
US-8,193,521 Resistive memory cell fabrication methods and devices
A phase change memory cell and methods of fabricating the same are presented. The memory cell includes a variable resistance region and a top and bottom...
US-8,193,092 Semiconductor devices including a through-substrate conductive member with an exposed end and methods of...
Semiconductor devices and methods of manufacturing semiconductor devices. One example of a method of fabricating a semiconductor device comprises forming a...
US-8,192,903 Photomasks
Some embodiments include methods of forming photomasks. A stack of at least three different materials is formed over a base. Regions of the stack are removed to...
US-8,192,555 Non-chemical, non-optical edge bead removal process
A method for removing the edge bead from a substrate by applying an impinging stream of a medium that is not a solvent for the material to be removed. The...
US-8,192,257 Method of manufacture of constant groove depth pads
Processing pads for mechanical and/or chemical-mechanical planarization or polishing of substrates in the fabrication of microelectronic devices, methods for...
US-8,191,159 Data security for digital data storage
A computing system includes data encryption in the data path between a data source and data storage devices. The data storage devices may be local or they may...
US-8,190,849 Sharing physical memory locations in memory devices
A memory structure includes a plurality of address banks where each address bank is operative to store a memory address. In certain embodiments, at least two of...
US-8,190,819 System and method for optimizing interconnections of memory devices in a multichip module
An apparatus and method couples memory devices in a memory module to a memory hub on the module such that signals traveling from the hub to the devices have the...
US-8,189,450 Method and apparatus providing high density chalcogenide-based data storage
A data storage device and methods for storing and reading data are provided. The data storage device includes a data storage medium and second device. The data...
US-8,189,420 Advanced detection of memory device removal, and methods, devices and connectors
Memory devices, connectors and methods for terminating an operation are provided, including a memory device configured to terminate an internal operation such...
US-8,189,414 Maintenance of amplified signals using high-voltage-threshold transistors
Systems, apparatus, memory devices, sense amplifiers and methods are provided, such as a system that includes an input node, a first transistor having a gate...
US-8,189,387 Flash memory with multi-bit read
A memory device is described that comprises determining which read data state of more than 2.sup.X read data states a memory cell is in after the memory cell...
US-8,189,382 Read method for MLC
Memory devices adapted to process and generate analog data signals representative of data values of two or more bits of information facilitate increases in data...
US-8,189,376 Integrated circuit having memory cells including gate material having high work function, and method of...
An integrated circuit device (e.g., a logic or memory device) having a memory section including a plurality of memory cells, wherein each memory cell thereof...
US-8,189,375 Methods of forming memory cells and methods of forming programmed memory cells
In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel...
US-8,189,366 Method and apparatus providing a cross-point memory array using a variable resistance memory cell and capacitance
The invention relates to a method and apparatus providing a memory cell array in which each resistance memory cell is connected in series to a capacitive...
US-8,188,533 Write once read only memory employing charge trapping in insulators
Structures and methods for write once read only memory employing charge trapping in insulators are provided. The write once read only memory cell includes a...
US-8,188,464 Atomic layer deposition systems and methods including metal beta-diketiminate compounds
The present invention provides atomic layer deposition systems and methods that include metal compounds with at least one .beta.-diketiminate ligand. Such...
US-8,187,983 Methods for fabricating semiconductor components using thinning and back side laser processing
A method for fabricating semiconductor components includes the steps of providing a semiconductor substrate having a circuit side, a back side and integrated...
US-8,187,934 Reverse construction memory cell
A method of fabricating a memory cell comprises forming a plurality of doped semiconductor layers on a carrier substrate. The method further comprises forming a...
US-8,187,933 Methods of forming dielectric material-containing structures
Some embodiments include dielectric structures. The structures include first and second portions that are directly against one another. The first portion may...
US-8,187,901 Epitaxial formation support structures and associated methods
Epitaxial formation support structures and associated methods of manufacturing epitaxial formation support structures and solid state lighting devices are...
US-8,187,487 Material removal methods employing solutions with reversible ETCH selectivities
A method for removing (e.g., etching) different dielectric materials from a semiconductor substrate includes exposing the semiconductor substrate to a solution...
US-8,184,492 Tri-state driver circuits having automatic high-impedance enabling
Memories, driver circuits, and methods for generating an output signal in response to an input signal. One such driver circuit includes an input stage and an...
US-8,184,489 Level shifting circuit
A level shifting circuit having an input and an output where the level shifting circuit is configured to receive a logical high level having a first voltage...
US-8,184,487 Modified read operation for non-volatile memory
A method may comprise executing a read operation to access a memory array by performing a preactive command to include a row-address-write operation and a...
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