At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.
Method and apparatus for reducing oscillation in synchronous circuits
Control signal oscillation filtering circuits, delay locked loops, clock synchronization methods and devices and systems incorporating the control signal...
Apparatus and methods for programming multilevel-cell NAND memory devices
Methods and apparatus are provided. A first data value is read from a first memory cell and is stored. An attempt is made to add a second data value to the...
Memory device biasing method and apparatus
Memory devices and methods are disclosed, such as those facilitating data line shielding by way of capacitive coupling with data lines coupled to a memory...
Memory array having a programmable word length, and method of operating
A memory cell array and device having a memory cell array (i.e., an integrated circuit device, for example, a logic device (such as, a microcontroller or...
Spatial light modulators with changeable phase masks for use in
holographic data storage
A holographic data storage system that includes a write head that includes a pixellated spatial light modulator and a separate or integral phase mask that...
DC-DC converter switching transistor current measurement technique
A method is described comprising conducting a first current through a switching transistor. The method also comprises conducting a second current through a pair...
Semiconductor devices with signal synchronization circuits
Semiconductor devices are disclosed providing synchronization circuits for synchronized signal distribution for a plurality of devices in a semiconductor...
Reconfigurable connections for stacked semiconductor devices
Some embodiments include apparatus, systems, and methods comprising semiconductor dice arranged in a stack, a number of connections configured to provide...
Nanowire transistor with surrounding gate
One aspect of the present subject matter relates to a method for forming a transistor. According to an embodiment of the method, a pillar of amorphous...
Memory cells, memory cell constructions, and memory cell programming
Some embodiments include memory cells including a memory component having a first conductive material, a second conductive material, and an oxide material...
Memory device constructions, memory cell forming methods, and
semiconductor construction forming methods
Memory device constructions include a first column line extending parallel to a second column line, the first column line being above the second column line; a...
Methods of forming patterns
Some embodiments include methods of forming patterns of openings. The methods may include forming spaced features over a substrate. The features may have tops...
Methods for depositing material onto microfeature workpieces in reaction
chambers and systems for depositing...
Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces are...
System and method for hidden-refresh rate modification
A system and method for modifying a hidden-refresh rate for dynamic memory cells includes monitoring a control signal from a processor and performing a...
Memory with sub-blocks
A non-volatile memory comprising a NOR block with a first sub-block independently addressable from a second sub-block, the two sub-blocks sharing a physical...
Reading non-volatile multilevel memory cells
Embodiments of the present disclosure provide methods, devices, modules, and systems for reading non-volatile multilevel memory cells. One method includes...
Read window in chalcogenide semiconductor memories
Using a shorter read pulse width may increase read window in some embodiments. This may allow the use of higher voltages with less likelihood of a read disturb...
Stacked device identification assignment
Some embodiments include apparatus and methods having dice arranged in a stack. The dice include at least a first die and a second die, and a connection coupled...
Optics arrangements including light source arrangements for an active
matrix liquid crystal generator
A system for producing modulated lights disclosed. The system comprises a spatial light modulator including a light modulating medium switchable between...
Active matrix liquid crystal image generator
A system for producing spatially modulated monochrome or color light having gray scale includes an active matrix liquid crystal spatial light modulator having...
Temperature compensation via power supply modification to produce a
temperature-independent delay in an...
A method and circuitry for adjusting the delay of a variable delay line (VDL) in a delay locked loop (DLL) or other delay element or subcircuit on an integrated...
Electronic device package structures
A sealing layer is provided on a surface of a substrate, such as a semiconductor wafer. The sealing layer includes apertures which expose external contact...
Method of forming memory devices by performing halogen ion implantation
and diffusion processes
Disclosed is a method of forming memory devices employing halogen ion implantation and diffusion processes. In one illustrative embodiment, the method includes...
Method to deposit conformal low temperature SiO2
Methods of controlling critical dimensions of reduced-sized features during semiconductor fabrication through pitch multiplication are disclosed. Pitch...
Methods of forming non-volatile memory having tunnel insulator of
increasing conduction band offset
Methods of forming non-volatile memory cell structures are described that facilitate the use of band-gap engineered gate stacks with asymmetric tunnel barriers...
Methods of forming a plurality of capacitors
A method of forming a plurality of capacitors includes an insulative material received over a capacitor array area and a circuitry area. The array area...
Self-aligned, planar phase change memory elements and devices, systems
employing the same and method of forming...
Phase change memory elements, devices and systems using the same and methods of forming the same are disclosed. A memory element includes first and second...
Solid state lighting devices and associated methods of manufacturing
Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state light device includes a light...
Prevention of photoresist scumming
A photo acid generator (PAG) or an acid is used to reduce resist scumming and footing. Diffusion of acid from photoresist into neighbors causes a decreased acid...
Memory system and method using a memory device die stacked with a logic
die using data encoding, and system...
A memory system and method using at least one memory device die stacked with and coupled to a logic die by interconnects, such as through silicon vias. One such...
Memory devices and methods for managing error regions
Memory devices and methods are described that include a stack of memory dies and a logic die. Method and devices described include those that provide for...
Programming memory cells with additional data for increased threshold
Methods for data transfer and/or programming a memory device, memory devices and memory systems are provided. According to at least one such method, additional...
Verifying an erase threshold in a memory device
In one or more embodiments, a memory device is disclosed as having an erase verify operation that includes a negative bias on the p-well in which the memory...
Sensing against a reference cell
Memory devices, bulk storage devices, and methods of operating memory are disclosed, such as those adapted to process and generate analog data signals...
Biasing system and method
Embodiments are provided that include a memory system that includes a memory system, having an access device coupled between a global line and a local line and...
Fractional bits in memory cells
Methods, devices, modules, and systems for programming memory cells can include storing charges corresponding to a data state that represents an integer number...
High performance input receiver circuit for reduced-swing inputs
An input buffer receiver circuit for electronic devices (e.g., memory chips) to receive and process reduced-swing and high bandwidth inputs to obtain "buffered"...
Phase mixer with adjustable load-to-drive ratio
Phase mixers, clock signal generators, memories and methods for providing an output signal having a phase relative to the phase difference of input clock...
Multi-phase signal generator and method
Multi-phase signal generators and methods for generating multi-phase signals are described. In one embodiment, the clock generator generates quadrature clock...
Semiconductor device packages and assemblies
A semiconductor device package includes a carrier, one or more semiconductor devices on the carrier, and a redistribution element above the uppermost of the one...
Method for forming terminal of stacked package element and method for
forming stacked package
A semiconductor chip module having high degree of freedom in assignment of a circuit to each semiconductor chip and in position of a connection terminal of each...
Elimination of RDL using tape base flip chip on flex for die stacking
A flexible film interposer for stacking a flip chip semiconductor die onto a second (bottom) semiconductor die, semiconductor devices and stacked die assemblies...
Nanolaminates of hafnium oxide and zirconium oxide
A dielectric film containing a HfO.sub.2/ZrO.sub.2 nanolaminate and a method of fabricating such a dielectric film produce a reliable dielectric layer having an...
High-performance one-transistor memory cell
One aspect of this disclosure relates to a memory cell. In various embodiments, the memory cell includes an access transistor having a floating node, and a...
Localized compressive strained semiconductor
One aspect of the present subject matter relates to a method for forming strained semiconductor film. According to an embodiment of the method, a crystalline...
Phase change memory devices
A phase change material including a high adhesion phase change material formed on a dielectric material and a low adhesion phase change material formed on the...
Memory devices and methods of forming the same
Memory devices having a plurality of memory cells, with each memory cell including a phase change material having a laterally constricted portion thereof. The...
Methods of etching oxide, reducing roughness, and forming capacitor
The invention includes methods in which one or more components of a carboxylic acid having an aqueous acidic dissociation constant of at least 1.times.10.sup.-6...
Etchant gas and a method for removing material from a late transition
An etchant gas and a method for removing at least a portion of a late transition metal structure. The etchant gas includes PF.sub.3 and at least one oxidizing...
Method for forming a ruthenium film
Methods for forming ruthenium films and semiconductor devices such as capacitors that include the films are provided.