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Patent # Description
US-8,952,299 Dual resistance heater for phase change devices and manufacturing method thereof
A dual resistance heater for a phase change material region is formed by depositing a resistive material. The heater material is then exposed to an implantation...
US-8,951,910 Methods for fabricating and forming semiconductor device structures including damascene structures
A method and apparatus for providing a conductive structure adjacent to a damascene conductive structure in a semiconductor device structure. The semiconductor...
US-8,951,903 Graded dielectric structures
Graded dielectric layers and methods of fabricating such dielectric layers provide dielectrics in a variety of electronic structures for use in a wide range of...
US-8,951,880 Dielectrics containing at least one of a refractory metal or a non-refractory metal
Electronic apparatus and methods of forming the electronic apparatus may include one or more insulator layers having a refractory metal and a non-refractory...
US-8,951,865 Memory arrays where a distance between adjacent memory cells at one end of a substantially vertical portion is...
Memory arrays and their formation are disclosed. One such memory array has a string of series-coupled memory cells with a substantially vertical portion. A...
US-8,951,858 Imager device with electric connections to electrical device
An imager device is disclosed including a first substrate having an array of photo-sensitive elements formed thereon, a first conductive layer formed above the...
US-8,951,842 Semiconductor growth substrates and associated systems and methods for die singulation
Semiconductor growth substrates and associated systems and methods for die singulation are disclosed. A representative method for manufacturing semiconductor...
US-8,951,832 Variable-resistance material memories and methods
Variable-resistance memory material cells are contacted by vertical bottom spacer electrodes. Variable-resistance material memory spacer cells are contacted...
US-8,951,829 Resistive switching in memory cells
Methods, devices, and systems associated with oxide based memory can include a method of forming a resistive switching region of a memory cell. Forming a...
US-8,951,433 Compositions for use in semiconductor devices
An improved composition and method for cleaning a surface of a semiconductor wafer are provided. The composition can be used to selectively remove a low-k...
US-8,951,354 Megasonic cleaning with controlled boundary layer thickness and associated systems and methods
Megasonic cleaning systems and methods of using megasonic pressure waves to impart cavitation energy proximate a surface of a microelectronic substrate are...
US-8,949,626 Protection of security parameters in storage devices
Security parameters used to encrypt data stored on a storage device may be protected using embodiments of systems and methods described herein. During a resize...
US-8,949,574 Low power, hash-content addressable memory architecture
A method is comprised of inputting a comparand word to a plurality of hash circuits, each hash circuit being responsive to a different portion of the comparand...
US-8,949,538 Interface device accessing a stack of memory dice and a solid state disk
Memory requests for information from a processor are received in an interface device, and the interface device is coupled to a stack including two or more...
US-8,949,492 Apparatus including buffer allocation management and related methods
Memory system controllers can include hardware masters, first buffers, and a switch coupled to the hardware masters and to the first buffers. The switch can...
US-8,948,192 Data switch
A data switch for an integrated circuit comprising at least one link for receiving input data packets from an independently modulated spread spectrum clock...
US-8,947,965 Techniques for providing a direct injection semiconductor memory device
Techniques for providing a direct injection semiconductor memory device are disclosed. In one exemplary embodiment, the techniques may be realized as a direct...
US-8,947,952 Input-output line sense amplifier having adjustable output drive capability
An input-output line sense amplifier configured to drive input data signals over an input-output signal line to an output driver circuit, the input-output line...
US-8,947,946 Leakage measurement systems
Described examples include leakage measurement systems and methods for measuring leakage current between a word line at a boosted voltage and a word line at a...
US-8,947,934 Sharing local control lines across multiple planes in a memory device
Memory devices, methods for accessing a memory cell, and memory systems are disclosed. One such memory device includes a plurality of planes of memory cells....
US-8,947,570 Method, apparatus, and system providing a rectilinear pixel grid with radially scaled pixels
Pixels in an imaging device pixel array are sized according to their geographic location in the pixel array to compensate for various optical ...
US-8,947,144 Apparatuses and methods for duty cycle adjustment
Apparatuses and methods for duty cycle adjustment are disclosed herein. An example apparatus may include a node, a phase mixer, and a duty cycle adjuster...
US-8,947,141 Differential amplifiers, clock generator circuits, delay lines and methods
A differential amplifier may be configured to have a duty cycle and/or gain that is adjustable, such as by adjusting the switch points of circuitry in the...
US-8,946,907 Self-aligned nano-structures
A method for creating structures in a semiconductor assembly is provided. The method includes etching apertures into a dielectric layer and applying a polymer...
US-8,946,903 Electrically conductive laminate structure containing graphene region
Some embodiments include electrical interconnects. The interconnects may contain laminate structures having a graphene region sandwiched between non-graphene...
US-8,946,873 Redistribution structures for microfeature workpieces
Microfeature dies with redistribution structures that reduce or eliminate line interference are disclosed. The microfeature dies can include a substrate having...
US-8,946,815 Floating body transistor constructions, semiconductor constructions, and methods of forming semiconductor...
The invention includes floating body transistor constructions containing U-shaped semiconductor material slices. The U-shapes have a pair of prongs joined to a...
US-8,946,807 3D memory
Three-dimensional memory cells and methods of making and using the memory cells are discussed generally herein. In one or more embodiments, a three-dimensional...
US-8,946,086 Methods of forming patterns, and methods of forming integrated circuitry
Some embodiments include methods of forming a pattern. First lines are formed over a first material, and second lines are formed over the first lines. The first...
US-8,946,076 Methods of fabricating integrated structures, and methods of forming vertically-stacked memory cells
Some embodiments include methods of forming vertically-stacked memory cells. An opening is formed to extend partially through a stack of alternating...
US-8,946,043 Methods of forming capacitors
A method of forming capacitors includes forming support material over a substrate. A first capacitor electrode is formed within individual openings in the...
US-8,946,018 Methods of forming memory arrays and semiconductor constructions
Some embodiments include methods of forming semiconductor constructions. A heavily-doped region is formed within a first semiconductor material, and a second...
US-8,945,996 Methods of forming circuitry components and methods of forming an array of memory cells
A method of forming circuitry components includes forming a stack of horizontally extending and vertically overlapping features. The stack has a primary portion...
US-8,945,950 STT-MRAM cell structures
A magnetic cell structure including a nonmagnetic bridge, and methods of fabricating the structure are provided. The magnetic cell structure includes a free...
US-8,945,700 Polymeric materials in self-assembled arrays and semiconductor structures comprising polymeric materials
Methods for fabricating sublithographic, nanoscale microstructures in line arrays utilizing self-assembling block copolymers, and films and devices formed from...
US-8,945,403 Material test structure
Material test structures having cantilever portions and methods of forming the same are described herein. As an example, a method of forming a material test...
US-8,945,305 Methods of selectively forming a material using parylene coating
Methods for depositing a material, such as a metal or a transition metal oxide, using an ALD (atomic layer deposition) process and resulting structures are...
US-8,943,387 Programming management data for a memory
Methods, apparatus, systems, and data structures may operate to combine block management data with a portion of data, to generate error correction data for the...
US-8,943,298 Meta predictor restoration upon detecting misprediction
Methods and apparatus for restoring a meta predictor system upon detecting a branch or binary misprediction, are disclosed. An example apparatus may include a...
US-8,942,054 Systems, memories, and methods for operating memory arrays
Memories, systems, and methods for refreshing are provided, such as a memory with an array of memory cells divided into sections. Memories include replacement...
US-8,942,045 Memory apparatus and methods
Embodiments of apparatus and methods having a memory device can include a line to exchange information with a string of memory cells and a transistor coupled...
US-8,941,171 Flatband voltage adjustment in a semiconductor device
Memory devices, methods for fabricating, and methods for adjusting flatband voltages are disclosed. In one such memory device, a pair of source/drain regions...
US-8,940,592 Memories and methods of forming thin-film transistors using hydrogen plasma doping
Methods of forming thin-film transistors and memories are disclosed. In one such method, polycrystalline silicon is hydrogen plasma doped to form doped...
US-8,940,581 Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a packaged...
US-8,940,388 Insulative elements
Methods of forming an insulative element are described, including forming a first metal oxide material having a first dielectric constant, forming a second...
US-8,940,102 Methods of removing particles from over semiconductor substrates
Some embodiments include methods of removing particles from over surfaces of semiconductor substrates. Liquid may be flowed across the surfaces and the...
US-8,938,657 Data and error correction code mixing device and method
Memory devices and methods are described such as those that mix data and associated error correction code blocks between multiple memory device locations....
US-8,938,630 Apparatus power control
The present disclosure includes apparatuses and methods for apparatus power control. A number of embodiments include determining a power profile for each of a...
US-8,938,590 Indirect register access method and system
Systems and methods are provided for managing access to registers. In one embodiment, a system may include a processor and a plurality of registers. The...
US-8,938,376 Simulating the transmission and simultaneous switching output noise of signals in a computer system
Methods implementable in a computer system for simulating the transmission of signals across a plurality of data channels (bus) are disclosed. The disclosed...
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