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Block repair scheme
Systems, memory arrays and methods (e.g., methods of block repair) are provided. One such system includes a memory array including a memory bank including a...
Current mode memory apparatus, systems, and methods
Some embodiments include a first circuit to drive signals at first circuit output nodes, and a second circuit to generate output signals at second circuit...
Reference current sources
Systems, methods, and devices are disclosed, including an electronic device that includes a first data location, a quantizing circuit, and a reference current...
Analog read and write paths in a solid state memory device
A memory array in a memory device is coupled to an analog I/O data interface that enables analog voltage levels to be written to the memory array. The I/O...
Methods of quantizing signals using variable reference signals
Methods for reading a data location coupled to an electrical conductor. A counter receives a signal from an analog-to-digital converter coupled to the...
Stacked microelectronic device assemblies
An assembly of microelectronic devices and method for forming an assembly of microelectronic devices. In one embodiment, the method includes positioning a first...
Memory devices, transistor devices and related methods
A memory device and method of making the memory device. The memory device comprises a storage transistor at a surface of a substrate. The storage transistor...
Conductive layers for hafnium silicon oxynitride films
Electronic apparatus and methods of forming the electronic apparatus include a HfSiON film on a substrate for use in a variety of electronic systems. The HfSiON...
Methods of forming recessed access devices associated with semiconductor
The invention includes methods of forming recessed access devices. A substrate is provided to have recessed access device trenches therein. A pair of the...
Fabricating sub-lithographic contacts
A small critical dimension element, such as a heater for an ovonic unified memory, may be formed within a pore by using successive sidewall spacers. The use of...
Method of iterative compensation for non-linear effects in
three-dimensional exposure of resist
The field of this disclosure is making three-dimensional topographic structures by means of graduated exposure in a photosensitive material, such as a...
Phase shift mask with two-phase clear feature
Systems and methods are provided for use in photolithography. In one embodiment, a reticle is provided that comprises a phase shift and transmission control...
Method for packaging circuits
A method for packaging integrated circuit chips (die) is described that includes providing a base substrate with package level contacts, coating a base...
Data storage with an outer block code and a stream-based inner code
Apparatus and methods store stream-based error recovery data for a memory array, such as a NAND flash array. Conventionally, data is block coded per industry...
Adjustable byte lane offset for memory module to reduce skew
Disclosed herein are solutions for addressing the problem of skew of data within a byte lane by factors caused external to the integrated circuit or module...
Capturing read data
Various techniques are disclosed for providing data retrieved from a memory device and furnished to a memory bus in response to a read operation to a local bus...
Digital frequency locked delay line
A device includes a signal generator having a delay locked circuit for providing a number of output signals based on an input signal. The output signals have a...
Integrated circuit having voltage generation circuitry for memory cell
array, and method of operating and/or...
A method of generating a voltage as well as an integrated circuit device (e.g., a logic device or a memory device) having a memory cell array which includes (i)...
Apparatus and methods having majority bit detection
Electronic apparatus and fabrication of the electronic apparatus that includes detection of the majority of values in a plurality of data bits may be used in a...
Erase voltage reduction in a non-volatile memory device
In erasing a memory block of memory cells, a semiconductor tub that contains a memory block to be erased can be biased with a high, positive voltage. The...
Memory devices and methods of writing data to memory devices utilizing
analog voltage levels
Memory devices, and methods of writing data to memory devices, utilizing analog voltage levels indicative of threshold voltages and desired threshold voltages...
Method apparatus, and system providing adjustable memory page
A method, apparatus and system providing a memory device having an array of cells which may be selectively designated for either error correction code use or...
Multi-pass programming in a memory device
A method for programming a memory device, a memory device, and a memory system are provided. According to at least one such method, a first programming pass...
Memory device and method having charge level assignments selected to
minimize signal coupling
A non-volatile memory device programs memory cells in each row in a manner that minimizes the coupling of spurious signals. A control logic unit programs the...
Providing a ready-busy signal from a non-volatile memory device to a
A common standard may be used for both dynamic random access memories and non-volatile memories, despite the fact that the non-volatile memory generally needs...
Multilayer wiring board and electrical connecting apparatus using the same
The present invention makes repair easy and reduces effects on the electrical connection conditions of an electronic component to an internal wiring after...
Apparatus and method for eliminating artifacts in active pixel sensor
An active pixel sensor (APS) that includes circuitry to eliminate artifacts in digital images. The APS includes a comparator for comparing a signal level from a...
Band-gap reference voltage detection circuit
Methods, devices, modules, and systems for a band-gap reference voltage detection circuit are provided. One embodiment for a band-gap reference voltage...
Contact for electrical test of electronic devices, probe assembly and
method for manufacturing the same
A contact for an electrical test comprises a first area to be bonded to a board, a second area extending in the right-left direction from the lower end portion...
Apparatus and methods for testing microelectronic devices
Microelectronic devices, methods for testing microelectronic devices, and detachable electrical components. One embodiment of an apparatus for testing...
Semiconductor device assemblies and packages
A sacrificial substrate for fabricating semiconductor device assemblies and packages with edge contacts includes conductive elements on a surface thereof, which...
Stacked device conductive path connectivity
Various embodiments include apparatus and methods having circuitry to test continuity of conductive paths coupled to dice arranged in a stack.
Semiconductor structures including a movable switching element and systems
Semiconductor structures including a movable switching element having a base disposed on a conductive pad, a body extending from the base, and an end laterally...
Memory cells configured to allow for erasure by enhanced F-N tunneling of
holes from a control gate to a charge...
Memory cells including a control gate, a charge trapping material, and a charge blocking material between the control gate and the charge trapping material. The...
Methods of selectively growing nickel-containing materials
The invention includes methods of electroless plating of nickel selectively on exposed conductive surfaces relative to exposed insulative surfaces. The...
Microelectronic device wafers and methods of manufacturing
Methods of forming microelectronic device wafers include fabricating a plurality of semiconductor dies at an active side of a semiconductor wafer, depositing a...
Nanowire transistor with surrounding gate
One aspect of the present subject matter relates to a method for forming a transistor. According to an embodiment of the method, a pillar of amorphous...
Methods of forming non-volatile memory structure with crested barrier
Embodiments of methods of forming non-volatile memory structures are provided. In one such embodiment, first and second source/drain regions are formed on a...
Optical compensation devices, systems, and methods
Photolithographic apparatus, systems, and methods that make use of optical compensation devices are disclosed. In various embodiments, an imaging mask includes...
Refresh of non-volatile memory cells based on fatigue conditions
In one or more of the disclosed embodiments, memory cells in a memory device are refreshed upon an indication of a fatigue condition. In one such embodiment,...
Hybrid memory management
Methods and apparatus for managing data storage in hybrid memory devices utilizing single level and multi level memory cells. Logical addresses can be...
Reducing read failure in a memory device
Read failure is reduced by increasing the drain current through a serial string of memory cells during the read operation. In one embodiment, this is...
A display system that achieves a gamma characteristic different than 1, such as a gamma characteristic of 2 for example. The gamma characteristic may be...
Titanium nitride films
The use of atomic layer deposition (ALD) to form a conductive titanium nitride layer produces a reliable structure for use in a variety of electronic devices....
Integrated circuit devices with stacked package interposers
An IC device includes a die and a first package interposer stacked over a second package interposer. The IC device includes a first conductive connection from a...
Thickened sidewall dielectric for memory cell
Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a...
Among various methods, devices, and apparatuses, a number of methods are provided for forming a gap between circuitry. One such method includes depositing a...
Method of forming a nitrogen-enriched region within
The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a...
Semiconductor devices and structures including at least partially formed
container capacitors and methods of...
Methods of forming semiconductor devices that include one or more container capacitors include anchoring an end of a conductive member to a surrounding lattice...
Methods of forming and operating back-side trap non-volatile memory cells
Methods of forming and operating a back-side trap non-volatile memory cell. Method of forming a back-side trap non-volatile memory cell include forming a...