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Temporary mirroring, logical segregation, and redundant programming or
addressing for solid state drive operation
The present disclosure includes methods and devices for operating a solid state drive. One method embodiment includes mirroring programming operations such that...
Method and apparatus for selecting an operating mode based on a
determination of the availability of internal...
A system and method to operate an electronic device, such as a memory chip, with an output driver circuit that is configured to include an ODT (On-Die...
Apparatuses and methods for line charge sharing
Apparatuses and methods for charge sharing, between signal lines are disclosed. An example apparatus may include first and second lines and a charge sharing...
Apparatuses and methods for controlling delay circuits during an idle
state to reduce degradation of an...
Delay circuits may be controlled by apparatuses and methods during an idle state to reduce degradation of an electrical characteristic. An example apparatus...
Switching device structures and methods
Switching device structures and methods are described herein. A switching device can include a vertical stack comprising a material formed between a first and a...
Magnetic tunnel junctions
Some embodiments include a magnetic tunnel junction which has a conductive first magnetic electrode containing magnetic recording material, a conductive second...
Arrays of vertically-oriented transistors, and memory arrays including
An array includes vertically-oriented transistors. The array includes rows of access lines and columns of data/sense lines. Individual of the rows include an...
Device identification assignment and total device number detection
Various embodiments comprise apparatuses to assign a respective one of a sequence of unique device identification (ID) values to each die in a stacked device....
Single spacer process for multiplying pitch by a factor greater than two
and related intermediate IC structures
Single spacer processes for multiplying pitch by a factor greater than two are provided. In one embodiment, n, where n.gtoreq.2, tiers of stacked mandrels are...
State determination in resistance variable memory
An evaluation signal is applied to a memory cell in an array of resistance variable memory cells. The evaluation signal is configured to cause the memory cell...
Data paths using a first signal to capture data and a second signal to
output data and methods for providing data
Data paths, memories, and methods for providing data from memory are disclosed. An example read data path includes a delay path, and a clocked data register....
Semiconductor device including input/output circuit
Disclosed here is an apparatus that comprises a data terminal, a data output circuit including a plurality of output buffers coupled in common to the data...
Systems and methods to determine motion parameters using RFID tags
Systems and methods to determine motion parameters of physical objects using radio frequency identification (RFID) tags attached to the objects. In one...
Memory having internal processors and data communication methods in memory
Memory having internal processors, and methods of data communication within such a memory are provided. In one embodiment, an internal processor may...
Devices, systems, and methods of reducing chip select
Several systems and methods of chip select are described. In one such method, a device maintains two identifiers, (ID_a and ID_m). When the device receives a...
Method and apparatus for a volume management system in a non-volatile
Embodiments for partitioning a non-volatile memory device is described. In one embodiment a memory system includes a first addressable range of memory blocks...
Inspection apparatus and inspection method for inspecting a wiring board
An inspection apparatus for inspecting a wiring board having an opposing electrode facing an upper face of the wiring board, a capacitance meter electrically...
Apparatuses and methods for low power counting circuits
Apparatuses and methods for low power counting circuits are described herein. An example apparatus may include a frequency divider configured to receive an...
N-type field effect transistors, arrays comprising N-type
vertically-oriented transistors, methods of forming...
An n-type field effect transistor includes silicon-comprising semiconductor material comprising a pair of source/drain regions having a channel region...
Memory cell and an array of memory cells
A memory cell includes a first electrode and a second electrode. A select device and a programmable device are in series with each other between the first and...
DRAM arrays, semiconductor constructions and DRAM array layouts
Some embodiments include a DRAM array layout. Wordlines extend along a first direction, and bitlines extend along a second direction that crosses the first...
Semiconductor structures including carrier wafers and methods of using
such semiconductor structures
A semiconductor structure comprising a carrier wafer and a device wafer. The carrier wafer comprises trenches sized and configured to receive conductive pillars...
Double gated 4F2 dram CHC cell and methods of fabricating the same
A semiconductor device is provided that includes a fin having a first gate and a second gate formed on a first sidewall of the fin in a first trench, wherein...
Local self-boost using a plurality of cut-off cells on a single side of a
string of memory cells
Methods for local self-boost of a selected memory cell channel, memory devices, and systems are disclosed. One such method generates a cut-off channel under...
Apparatuses and methods for performing logical operations using sensing
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an...
Semiconductor memory device having sense amplifier
An apparatus includes a memory cell, a bit line coupled to the memory cell, and a sense amplifier configured to amplify a data signal on the bit line read out...
Semiconductor device including spiral data path
A semiconductor device disclosed in this disclosure includes a first terminal formed above a first surface of a semiconductor substrate, a second terminal...
Apparatuses and methods for improving retention performance of
hierarchical digit lines
Apparatuses and methods for improving retention performance of hierarchical digit lines are disclosed herein. An example apparatus may include a first digit...
Apparatus power control
The present disclosure includes apparatuses and methods for apparatus power control. A number of embodiments include determining a power profile for each of a...
Data conditioning to improve flash memory reliability
Methods for managing data stored in a memory device facilitate managing utilization of memory of different densities. The methods include reading first data...
Utilizing special purpose elements to implement a FSM
Apparatus, systems, and methods for a compiler are described. One such compiler generates machine code corresponding to a set of elements including a general...
Apparatuses and methods for providing clock signals
Apparatuses and methods for providing clock signals are described herein. An example apparatus may include a clock generator circuit. The clock generator...
Microfluidic mixing and analytical apparatus
Disclosed herein is a device comprising a pair of bellows pumps configured for efficient mixing at a microfluidic scale. By moving a fluid sample and particles...
Cash drawer with printer
Memory cells with recessed electrode contacts
Memory cells with recessed electrode contacts and methods of forming the same are provided. An example memory cell can include an electrode contact formed in a...
Memory cells, methods of fabrication, semiconductor device structures,
memory systems, and electronic systems
A magnetic cell core includes a seed region with a plurality of magnetic regions and a plurality of nonmagnetic regions thereover. The seed region provides a...
Semiconductor structures including molybdenum nitride, molybdenum
oxynitride or molybdenum-based alloy...
A semiconductor structure may include a first electrode over a substrate, a high-K dielectric material over the first electrode, and a second electrode over the...
Apparatuses including stair-step structures and methods of forming the
Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material,...
Methods of fabricating features associated with semiconductor substrates
Some embodiments include a method of fabricating features associated with a semiconductor substrate. A first region of the semiconductor substrate is altered...
Semiconductor memory column decoder device and method
Semiconductor memory devices and methods include a flash memory cell array fabricated in a well, with memory cells in the same column connected to each other in...
Some embodiments include memory devices having a wordline, a bitline, a memory element selectively configurable in one of three or more different resistive...
Method and apparatus for memory command input and control
Memories containing command decoder, chip enable, and signal truncation circuits are disclosed. One such command decoder circuit may include command decoder...
System and method for decoding commands based on command signals and
A system and method for decoding command signals that includes a command decoder configured to generate internal control signals to perform an operation based...
Apparatuses and methods for performing compare operations using sensing
The present disclosure includes apparatuses and methods related to performing compare and/or report operations using sensing circuitry. An example method can...
Apparatuses and method for supply voltage level detection
Example apparatuses and methods may detect when one or more supply voltage levels have reached a trigger voltage. An example apparatus may include a terminal, a...
Systems and methods using single antenna for multiple resonant frequency
A radio frequency device utilizing an antenna having a single antenna structure resonant on multiple resonant frequency ranges. The antenna can be configured to...
System and method for controlling user access to an electronic device
A method and system for authenticating a user to access a computer system. The method comprises communicating security information to the computer system, and...
Operation management in a memory device
Methods of operating a memory device include performing a first memory operation having an associated timing requirement; after completing the first memory...
Methods of forming patterns for semiconductor device structures
Methods of forming a pattern in a semiconductor device structure include deprotecting an outer portion of a first photosensitive resist material, forming a...
Semiconductor temperature sensor with high sensitivity
A temperature sensor circuit is disclosed. In one embodiment, the temperature sensor comprises an input circuit with a current mirror for forcing a current down...