At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.
A pharmaceutical preparation comprises nano-level particles (nanospheres) of a biocompatible polymer having, as held on their surfaces, an NF.kappa.B decoy...
Method of selectively depositing materials on a substrate using a
A method for depositing one or more materials on a substrate, such as for example, a semiconductor substrate that includes providing the substrate; applying a...
Wafer processing including forming trench rows and columns at least one of
which has a different width
Methods for processing semiconductor wafers are described herein. One embodiment includes removing portions of a first side of the semiconductor wafer to form a...
Non-volatile memory cell device and methods
A method of fabricating a memory cell including forming nanodots over a first dielectric layer and forming a second dielectric layer over the nanodots, where the...
Semiconductor device having reduced sub-threshold leakage
A semiconductor device fabricated in the semiconductor substrate includes a FinFET transistor having opposed source and drain pillars, and a fin interposed...
Methods of forming recessed access devices associated with semiconductor
The invention includes methods of forming recessed access devices. A substrate is provided to have recessed access device trenches therein. A pair of the...
Apparatus and methods for temperature calibration and sensing
Some embodiments include apparatus and methods having a first switch, a second switch, and a circuit coupled to the first and second switches. The first switch...
System and method for testing a packetized memory device
Integrated circuits, load boards and methods are disclosed, such as those associated with a memory testing system that includes an algorithmic pattern generator...
System and method for initializing a memory system, and memory device and
processor-based system using same
Systems, controllers and methods are disclosed, such as an initialization system including a controller that receives patterns of read data coupled from a memory...
Memory system and method using partial ECC to achieve low power refresh
and fast access to data
A DRAM memory device includes several banks of memory cells each of which are divided into first and second sets of memory cells. The memory cells in the first...
Array sense amplifiers, memory devices and systems including same, and
methods of operation
A sense amplifier having an amplifier stage with decreased gain is described. The sense amplifier includes a first input/output ("I/O") node and a second...
Circuits, systems, and methods for reducing simultaneous switching output
noise, power noise, or combinations...
Memory devices and methods are provided for reducing simultaneous switching output noise and power supply noise during burst data write and refresh operations....
Sensing of memory cells in a solid state memory device by fixed discharge
of a bit line
In one or more of the disclosed embodiments, a memory device is provided that reads a target memory cell by first charging the series string of memory cells to...
Controlling a memory device responsive to degradation
Embodiments of the present invention disclosed herein include devices, systems and methods, such as those directed to non-volatile memory devices and systems...
Electron induced chemical etching for device level diagnosis
A method of imaging and identifying materials, contamination, fabrication errors, and defects on and below the surface of an integrated circuit (IC) is...
Methods for fabricating and filling conductive vias and conductive vias so
Methods for forming conductive vias include forming one or more via holes in a substrate. The via holes may be formed with a single mask, with protective layers,...
Vapor deposition methods for forming a metal-containing layer on a
Atomic layer deposition methods as described herein can be advantageously used to form a metal-containing layer on a substrate. For example, certain methods as...
Isolation trenches for memory devices
A first dielectric plug is formed in a portion of a trench that extends into a substrate of a memory device so that an upper surface of the first dielectric plug...
Methods of forming semiconductor constructions, and methods of forming
Some embodiments include methods of forming isolation regions in which spin-on material (for example, polysilazane) is converted to a silicon dioxide-containing...
Technique for forming shallow trench isolation structure without corner
A shallow isolation trench structure and methods of forming the same wherein the method of formation comprises a layered structure of a buffer film layer over a...
Methods of forming capacitors
Some embodiments include methods of forming capacitors. Storage nodes are formed within a material. The storage nodes have sidewalls along the material. Some of...
Flash memory device having a graded composition, high dielectric constant
A graded composition, high dielectric constant gate insulator is formed between a substrate and floating gate in a flash memory cell transistor. The gate...
Method and apparatus for storing failing part locations in a module
A non-volatile storage device on a memory module comprising a plurality of memory devices is used to store the locations of defective parts on the memory module,...
Adjusting programming or erase voltage pulses in response to a rate of
programming or erasing
Memory devices and methods of operating memory devices are provided. In one such embodiment, a programming voltage pulse or an erase voltage pulse is applied to...
Read operation for NAND memory
Non-volatile memory devices utilizing a NAND architecture are adapted to perform read operations where a first potential is supplied to a source line selectively...
Clock distribution network
Some embodiments include apparatus and methods having a clock path with a combination of current-mode logic (CML) based and complementary metal-oxide...
Current test probe having a solder guide portion, and related probe
assembly and production method
A probe for current test is provided. The probe includes a probe body having a plate-like connection portion whose end face becomes a connection face to a probe...
Interconnect line selectively isolated from an underlying contact plug
A means for selectively electrically connecting an electrical interconnect line, such as a bit line of a memory cell, with an associated contact stud and...
Strained semiconductor, devices and systems and methods of formation
In various method embodiments, a device region is defined in a semiconductor substrate and isolation regions are defined adjacent to the device region. The...
Surround gate access transistors with grown ultra-thin bodies
A vertical transistor having an annular transistor body surrounding a vertical pillar, which can be made from oxide. The transistor body can be grown by a solid...
Method of forming an antifuse and a conductive interconnect, and methods
of forming DRAM circuitry
A first via opening is formed to a first conductor and a second via opening is formed to a second conductor. The first and second via openings are formed through...
Method of fabicating a microelectronic die having a curved surface
Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a device includes a support member and a...
Semiconductor device assemblies and systems including at least one
conductive pathway extending around a side...
Semiconductor device assemblies and systems that include at least one semiconductor device assembly include two or more semiconductor devices stacked one over...
Methods of forming a phase change material
Methods of forming a phase change material are disclosed. The method includes forming a chalcogenide compound on a substrate and simultaneously applying a bias...
Method in an integrated circuit (IC) manufacturing process for identifying
and redirecting ICs mis-processed...
A method of manufacturing IC devices from semiconductor wafers includes providing the wafers and fabricating ICs on the wafers. At probe, a unique fuse ID is...
Redundant memory array for replacing memory sections of main memory
Memories and methods for replacing memory sections of a main memory array by mapping memory addresses for an entire main memory section to at least one memory...
IC carrie, IC socket and method for testing IC device
An IC device (10) held on an IC carrier (24) is a double-sided electrode type BGA IC device (10) provided with bump electrodes (14) on a first surface of a...
Probe card layout
Multi-touchdown, parallel test probe cards having probe elements arranged to provide greater efficiency during testing of a substrate having a plurality of die...
Method for production of MRAM elements
Magneto-resistive random access memory elements include a ferromagnetic layer having uniaxial anisotropy provided by elongate structures formed in the...
Imaging devices having a layer of pixel component material with discrete
constructs for operating electrical...
Methods and structures to reduce the occurrence of crosstalk and pixel noise in solid state imager arrays. In an exemplary embodiment, a section of a layer...
Methods for forming interconnects in microelectronic workpieces and
microelectronic workpieces formed using...
Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods are disclosed herein. One embodiment,...
Super high density module with integrated wafer level packages
A wafer level package, and a semiconductor wafer, electronic system, and a memory module that include one or more of the wafer level packages, and methods of...
Methods of forming trench isolation and methods of forming arrays of FLASH
This invention includes methods of forming trench isolation. In one implementation, isolation trenches are provided within a semiconductor substrate. A liquid is...
Trench DRAM cell with vertical device and buried word lines
A DRAM array having trench capacitor cells of potentially 4F.sup.2 surface area (F being the photolithographic minimum feature width), and a process for...
Semiconductor processing methods
The invention includes methods of forming electrically conductive material between line constructions associated with a peripheral region or a pitch region of a...
Methods of forming memory cells, and methods of forming programmed memory
In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel region;...
Method and apparatus to sort nanotubes
Methods and systems for sorting nanostructures, such as nanodot or nanotubes, are described. The sorting of the nanostructures removes remnants of the nanotube...
Method for fabricating semiconductor component having encapsulated through
wire interconnect (TWI)
A method for fabricating a semiconductor component with an encapsulated through wire interconnect includes the steps of providing a substrate having a first...
Parameter measurement using multi-layer structures
Various embodiments disclosed herein include methods for measuring a parameter associated with a workpiece. Such a method may include providing a first overlay...
Chemical vaporizer for material deposition systems and associated methods
System and method for operating a material deposition system are disclosed. In one embodiment, the method can include periodically injecting a precursor into a...