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Patent # Description
US-9,471,425 Data conditioning to improve flash memory reliability
Methods for managing data stored in a memory device facilitate managing utilization of memory of different densities. The methods include reading first data...
US-9,471,290 Utilizing special purpose elements to implement a FSM
Apparatus, systems, and methods for a compiler are described. One such compiler generates machine code corresponding to a set of elements including a general...
US-9,471,087 Apparatuses and methods for providing clock signals
Apparatuses and methods for providing clock signals are described herein. An example apparatus may include a clock generator circuit. The clock generator...
US-9,468,894 Microfluidic mixing and analytical apparatus
Disclosed herein is a device comprising a pair of bellows pumps configured for efficient mixing at a microfluidic scale. By moving a fluid sample and particles...
US-D769,366 Cash drawer with printer
US-9,466,795 Memory cells with recessed electrode contacts
Memory cells with recessed electrode contacts and methods of forming the same are provided. An example memory cell can include an electrode contact formed in a...
US-9,466,787 Memory cells, methods of fabrication, semiconductor device structures, memory systems, and electronic systems
A magnetic cell core includes a seed region with a plurality of magnetic regions and a plurality of nonmagnetic regions thereover. The seed region provides a...
US-9,466,660 Semiconductor structures including molybdenum nitride, molybdenum oxynitride or molybdenum-based alloy...
A semiconductor structure may include a first electrode over a substrate, a high-K dielectric material over the first electrode, and a second electrode over the...
US-9,466,531 Apparatuses including stair-step structures and methods of forming the same
Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material,...
US-9,466,504 Methods of fabricating features associated with semiconductor substrates
Some embodiments include a method of fabricating features associated with a semiconductor substrate. A first region of the semiconductor substrate is altered...
US-9,466,380 Semiconductor memory column decoder device and method
Semiconductor memory devices and methods include a flash memory cell array fabricated in a well, with memory cells in the same column connected to each other in...
US-9,466,361 Memory devices
Some embodiments include memory devices having a wordline, a bitline, a memory element selectively configurable in one of three or more different resistive...
US-9,466,348 Method and apparatus for memory command input and control
Memories containing command decoder, chip enable, and signal truncation circuits are disclosed. One such command decoder circuit may include command decoder...
US-9,466,344 System and method for decoding commands based on command signals and operating state
A system and method for decoding command signals that includes a command decoder configured to generate internal control signals to perform an operation based...
US-9,466,340 Apparatuses and methods for performing compare operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing compare and/or report operations using sensing circuitry. An example method can...
US-9,466,337 Apparatuses and method for supply voltage level detection
Example apparatuses and methods may detect when one or more supply voltage levels have reached a trigger voltage. An example apparatus may include a terminal, a...
US-9,465,964 Systems and methods using single antenna for multiple resonant frequency ranges
A radio frequency device utilizing an antenna having a single antenna structure resonant on multiple resonant frequency ranges. The antenna can be configured to...
US-9,465,929 System and method for controlling user access to an electronic device
A method and system for authenticating a user to access a computer system. The method comprises communicating security information to the computer system, and...
US-9,465,539 Operation management in a memory device
Methods of operating a memory device include performing a first memory operation having an associated timing requirement; after completing the first memory...
US-9,465,287 Methods of forming patterns for semiconductor device structures
Methods of forming a pattern in a semiconductor device structure include deprotecting an outer portion of a first photosensitive resist material, forming a...
US-9,464,942 Semiconductor temperature sensor with high sensitivity
A temperature sensor circuit is disclosed. In one embodiment, the temperature sensor comprises an input circuit with a current mirror for forcing a current down...
US-9,461,246 Memory arrays and methods of forming memory arrays
Some embodiments include memory arrays having a plurality of memory cells vertically between bitlines and wordlines. The memory cells contain phase change...
US-9,461,242 Magnetic memory cells, methods of fabrication, semiconductor devices, memory systems, and electronic systems
A magnetic cell includes a free region between an intermediate oxide region (e.g., a tunnel barrier) and a secondary oxide region. Both oxide regions may be...
US-9,461,155 Thyristor random access memory device and method
Memory devices and methods of making memory devices are shown. Methods and configurations as shown provide folded and vertical memory devices for increased...
US-9,461,136 Memory device and method of fabricating thereof
Subject matter disclosed herein relates to a process flow to form a gate structure of a memory device.
US-9,461,079 Pixel with strained silicon layer for improving carrier mobility and blue response in imagers
An imager having a pixel cell having an associated strained silicon layer. The strained silicon layer increases charge transfer efficiency, decreases image lag,...
US-9,461,045 Semiconductor devices
Some embodiments include a semiconductor device having two gate electrodes which are of about a same gate width as one another, and having a first diffusion...
US-9,460,998 Semiconductor constructions and methods of forming semiconductor constructions
Some embodiments include a semiconductor construction having a pair of lines extending primarily along a first direction, and having a pair of contacts between...
US-9,460,803 Data path with clock-data tracking
A system includes a plurality of sensing devices, a first multiplexer, a plurality of local return clock signal paths, a second multiplexer, and a data latch....
US-9,460,792 Apparatuses and methods for segmented SGS lines
Apparatuses and methods for segmented SGS lines are described. An example apparatus may include first and second pluralities of memory subblocks of a memory...
US-9,460,784 Reference voltage generation apparatuses and methods
A method and apparatuses for generating a reference voltage are disclosed. One example apparatus includes a current source coupled to a first power supply. The...
US-9,460,783 Determining soft data
The present application includes apparatuses and methods for determining soft data. A number of embodiments include determining soft data associated with a data...
US-9,460,770 Methods of operating ferroelectric memory cells, and related ferroelectric memory cells
Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric...
US-9,460,762 Interfaces and die packages, and appartuses including the same
A memory device includes a memory die package including a plurality of memory dies, an interface device including an interface circuit, and a memory controller...
US-9,455,386 Vertical light emitting devices with nickel silicide bonding and methods of manufacturing
Various embodiments of light emitting devices, assemblies, and methods of manufacturing are described herein. In one embodiment, a method for manufacturing a...
US-9,455,266 Memory array with a pair of memory-cell strings to a single conductive pillar
An array of memory cells has a conductive pillar and a plurality of first and second memory cells coupled in series by the conductive pillar. Each first memory...
US-9,455,261 Integrated structures
Some embodiments include an integrated structure having a stack of alternating dielectric levels and conductive levels, vertically-stacked memory cells within...
US-9,455,043 Dynamic program window determination in a memory device
A memory device has a controller. The controller is configured to cause the memory device to inhibit programming of a group of memory cells. The controller is...
US-9,455,042 Programming methods and memories
Memory devices and programming methods for memories are disclosed, such as those adapted to program a memory using an increasing channel voltage for a first...
US-9,455,033 Apparatuses and/or methods for operating a memory cell as an anti-fuse
Embodiments disclosed herein relate to operating a memory cell as an anti-fuse, such as for use in phase change memory, for example.
US-9,455,029 Threshold voltage analysis
Apparatuses and methods for threshold voltage analysis are described. One or more methods for threshold voltage analysis include storing expected state...
US-9,455,020 Apparatuses and methods for performing an exclusive or operation using sensing circuitry
The present disclosure includes apparatuses and methods related to determining an XOR value in memory. An example method can include performing a NAND operation...
US-9,454,997 Array of nonvolatile memory cells having at least five memory cells per unit cell, having a plurality of the...
Disclosed is an array of nonvolatile memory cells includes five memory cells per unit cell. Also disclosed is an array of vertically stacked tiers of...
US-9,454,427 Shifting read data
This disclosure relates to avoiding a hard error in memory during write time by shifting data to be programmed to memory to mask the hard error. In one...
US-9,454,322 Results generation for state machine engines
A state machine engine includes a storage element, such as a (e.g., match) results memory. The storage element is configured to receive a result of an analysis...
US-9,454,310 Command queuing
The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory...
US-9,454,090 Methods and apparatuses for template cooling
Disclosed are cooling apparatus and methods of cooling a template. The cooling apparatus includes a reticle and an optical cooling material. The reticle...
US-9,452,492 Systems and methods for forming apertures in microfeature workpieces
Systems and methods for forming apertures in microfeature workpieces are disclosed herein. In one embodiment, a method includes directing a laser beam toward a...
US-9,450,152 Solid state transducer dies having reflective features over contacts and associated systems and methods
Systems and methods for improved light emitting efficiency of a solid state transducer (SST), for example light emitting diodes (LED), are disclosed. One...
US-9,450,067 Semiconductor devices comprising aluminum oxide
A semiconductor structure comprising aluminum oxide. The semiconductor structure comprises a dielectric material overlying a substrate. The aluminum oxide...
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