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Patent # Description
US-1,015,3014 DQS-offset and read-RTT-disable edge control
Devices, systems, and methods include controls for on-die termination (ODT) and data strobe signals. For example, a command to de-assert ODT for a data pin (DQ)...
US-1,015,3009 Apparatuses and methods for performing logical operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an...
US-1,015,3008 Apparatuses and methods for performing corner turn operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing corner turn operations using sensing circuitry. An example apparatus comprises a...
US-1,015,3007 Apparatuses including a memory array with separate global read and write lines and/or sense amplifier region...
Apparatuses and methods related to memory arrays with separate global read and write lines and/or sense amplifier region column select lines are disclosed. An...
US-1,015,2414 Line termination methods
Methods for termination of signal lines within a memory system include appointing a particular memory device of a plurality of memory devices to act as a...
US-1,015,2374 Error code calculation on sensing circuitry
Examples of the present disclosure provide apparatuses and methods for error code calculation. The apparatus can include an array of memory cells that are...
US-1,015,2373 Methods of operating memory including receipt of ECC data
Methods of operating a memory, including receiving first data to be written to an array of memory cells of the memory, receiving error correction code (ECC)...
US-1,015,2304 Apparatuses and methods for random number generation
The present disclosure includes apparatuses and methods for random number generation. An example method includes operating a sense amplifier of a memory device...
US-1,015,2271 Data replication
The present disclosure includes apparatuses and methods for data replication. An example apparatus includes a plurality of sensing circuitries comprising...
US-1,015,2262 Memory access techniques in memory devices with multiple partitions
Methods, systems, and devices for operating a memory array are described. A memory controller may be configured to provide enhanced bandwidth on a ...
US-1,015,2237 Non-deterministic memory protocol
The present disclosure includes apparatuses and methods related to a non-deterministic memory protocol. An example apparatus can perform operations on the...
US-1,015,2113 Dynamic power-down of a block of a pattern-recognition processor
A device includes a pattern-recognition processor. The pattern recognition processor includes blocks, such that each of the blocks include a plurality of...
US-1,015,1981 Methods of forming structures supported by semiconductor substrates
Some embodiments include methods of forming structures supported by semiconductor substrates. Radiation-imageable material may be formed over a substrate and...
US-1,014,9976 Placement of neural stimulators
A method for implanting a wireless neural stimulator device, the method including: making a surgical incision or a percutaneous opening on a patient's skin;...
US-1,014,8269 Dynamic termination edge control
Devices and methods include receiving a command at a command interface to assert on-die termination (ODT) during an operation. An indication of a shift mode...
US-1,014,7875 Semiconductor devices and electronic systems having memory structures
A semiconductor device comprises includes memory cells, a first dielectric liner material overlying side surfaces of the memory cells, a high-k dielectric...
US-1,014,7764 Constructions comprising stacked memory arrays
Some embodiments include a construction having a first memory array deck and a second memory array deck over the first memory array deck. The second memory...
US-1,014,7763 Resistive memory cell structures and methods
Resistive memory cell structures and methods are described herein. One or more memory cell structures comprise a first resistive memory cell comprising a first...
US-1,014,7727 Conductive structures, wordlines and transistors
Some embodiments include a conductive structure which has a first conductive material having a work function of at least 4.5 eV, and a second conductive...
US-1,014,7712 Memory device with a multiplexed command/address bus
A memory device includes a first plurality of volatile memories, a non-volatile memory, and a controller coupled to the non-volatile memory and including a...
US-1,014,7705 Stacked semiconductor die assemblies with die substrate extensions
Stacked semiconductor die assemblies with die substrate extensions are disclosed herein. In one embodiment, a semiconductor die assembly can include a package...
US-1,014,7638 Methods of forming staircase structures
Methods of forming staircase structures. The method comprises forming a patterned hardmask over tiers. An exposed portion of an uppermost tier is removed to...
US-1,014,7607 Semiconductor pitch patterning
A semiconductor pitch patterning can include a method comprising directionally forming a mask material on a first set of spacers. The first set of spacers can...
US-1,014,7606 Methods of forming semiconductor device structures including linear structures substantially aligned with other...
A method of forming a semiconductor device structure comprises forming a preliminary structure comprising a substrate, a photoresist material over the...
US-1,014,7497 Memory devices comprising magnetic tracks individually comprising a plurality of magnetic domains having domain...
A method of forming a memory device having magnetic tracks individually comprising a plurality of magnetic domains having domain walls, includes forming an...
US-1,014,7494 Apparatus configured to program memory cells using an intermediate level for multiple data states
Apparatus including an array of memory cells and a controller configured to apply a particular programming pulse to a plurality of memory cells having a first...
US-1,014,7486 Memory systems and memory programming methods
Memory systems and memory programming methods are described. According to one arrangement, a memory system includes a memory array comprising a plurality of...
US-1,014,7480 Sort operation in memory
Examples of the present disclosure provide apparatuses and methods related to performing a sort operation in a memory. An example apparatus might include a a...
US-1,014,7475 Refresh in memory based on a set margin
The present disclosure includes apparatuses and methods related to refresh in memory. An apparatus can refresh an array of memory cells in response to a portion...
US-1,014,7474 Memory cells and semiconductor devices including ferroelectric materials
Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric...
US-1,014,7472 Apparatuses and methods for targeted refreshing of memory
Apparatuses and methods for targeted row refreshes are disclosed herein. In an example apparatus, a predecoder receives a target row address and determines...
US-1,014,7468 Accessing data in memory
The present disclosure includes apparatuses and methods related to accessing data in memory. One example method comprises storing data associated with a first...
US-1,014,7467 Element value comparison in memory
The present disclosure includes apparatuses and methods related to performing a greater vector determination in memory. An example apparatus comprises a first...
US-1,014,7466 Voltage reference computations for memory decision feedback equalizers
A device includes a combinational circuit configured to create a one or more distortion correction factors used offset inter-symbol interference from a data...
US-1,014,7465 System and method of command based and current limit controlled memory device power up
Devices and systems for powering up a memory device, for example, are disclosed. One such memory device includes power up circuitry configured to receive an...
US-1,014,6970 RFID reader
A radio frequency identification (RFID) reader includes an RFID module configured to generate a radio frequency (RF) signal, a power divider configured to...
US-1,014,6719 Semiconductor layered device with data bus
Apparatuses and methods of data communication between semiconductor chips are described. An example apparatus includes: a first die including a first switch...
US-1,014,6617 Error control in memory storage systems
A method includes calculating a first syndrome of a codeword read from a memory location under a first set of conditions and calculating a second syndrome of...
US-1,014,6614 Encoding data in a modified-memory system
In one embodiment, a set of memory circuits is separated from a logic system by a bus. The logic system can contain many of the logic functions traditionally...
US-1,014,6561 Executing applications from a semiconductor nonvolatile memory
A processor-based device (e.g., a wireless device) may include a processor and a semiconductor nonvolatile memory to directly execute an application (e.g., an...
US-1,014,6555 Adaptive routing to avoid non-repairable memory and logic defects on automata processor
Systems and methods for utilizing a defect map to configure an automata processor in order to avoid defects when configuring the automata processor. A system...
US-1,014,6537 Vector population count determination in memory
Examples of the present disclosure provide apparatuses and methods for determining a vector population count in a memory. An example method comprises...
US-1,014,6477 Command queuing
The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory...
US-1,014,6457 Systems and methods for reordering packet transmissions in a scalable memory system protocol
A memory device includes a plurality of memory components that stores data and a processor communicatively coupled to the plurality of memory components. The...
US-1,014,6292 Power management
The present disclosure includes methods and apparatuses for power management. One method includes transferring data between a memory and a controller via an...
US-1,014,4044 Treatment of trade effluent from food waste disposal systems
A bioprocess comprises regulating pH of trade effluent wastewater, adding and mixing a first bio-additive, adding and mixing a flocculant/coagulant, filtering...
US-1,014,2137 Wireless devices and systems including examples of full duplex transmission
Examples described herein include systems and methods which include wireless devices and systems with examples of full duplex compensation with a...
US-1,014,2112 Solid state storage device with command and control access
Several embodiments of memory devices and systems with command and control access are described herein. In one embodiment, a memory device includes a controller...
US-1,014,1942 Apparatuses and methods for providing frequency divided clocks
Apparatuses and methods for providing frequency divided clocks are described. An example apparatus includes a first circuit configured to provide a first...
US-1,014,1932 Wiring with external terminal
Apparatuses for providing external terminals of a semiconductor device are described. An example apparatus includes: a pad included in a pad formation area that...
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