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Devices, systems, and methods related to forming through-substrate vias
with sacrificial plugs
Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming one or more...
Functional data programming and reading in a memory
Methods for functional programming memory cells and apparatuses are disclosed. One such method for functional programming includes encoding a group of data with...
Sense circuits, memory devices, and related methods for resistance
Sense circuits, memory devices, and related methods are disclosed. A sense circuit includes sample and hold circuitry configured to sample and hold a second...
Memory cells having a plurality of resistance variable materials
Resistance variable memory cells having a plurality of resistance variable materials and methods of operating and forming the same are described herein. As an...
Apparatuses and methods for identifying an extremum value stored in an
array of memory cells
The present disclosure includes apparatuses and methods related to identifying an extremum value using sensing circuitry. An example method can include...
Performing logical operations using sensing circuitry
Apparatuses and methods related to performing logical operations using sensing circuitry are disclosed. One apparatus comprises an array of memory cells,...
Quantizing circuits having improved sensing
A system including a processor and a memory device. The memory device includes a memory array having a plurality of memory elements connected to a bit-line and...
Multiple data channel memory module architecture
The present invention is directed generally to systems and methods which provide a memory module having multiple data channels that are independently accessible...
Low voltage sensing scheme having reduced active power down standby
A low voltage sensing scheme reduces active power down standby leakage current in a memory device. A damping device or diode is used between a Psense amplifier...
Systems and devices including multi-transistor cells and methods of using,
making, and operating the same
A device may include a first transistor, a second transistor, and a data element. The first transistor may have a column gate and a channel, and the second...
Receiving data streams in parallel and providing a first portion of data
to a first state machine engine and a...
An apparatus can include a first state machine engine configured to receive a first portion of a data stream from a processor and a second state machine engine...
Cache coherence protocol for persistent memories
A memory device having a memory controller, a main memory with at least a portion comprising persistent memory, and at least two processing entities, wherein...
Apparatuses and methods for encoding using error protection codes
Subject matter disclosed herein relates to error protection of data stored in and/or read from a memory device. Coefficient data representing canonical...
Machine tool to which rotary tool unit can be attached
A machine tool 1 includes a turret (4, 104) to which a tool unit 2 is adapted to be radially mounted, a cylindrical turret pivoting driving shaft (5, 105) for...
Handheld treatment device
A handheld treatment device can include a handheld housing; a transmitting antenna located in the handheld housing and configured to accept one or more input...
Multi-function, modular system for network security, secure communication,
and malware protection
Representative embodiments are disclosed for providing network and system security. A representative apparatus includes an input-output connector coupleable to...
Locked-loop quiescence apparatus, systems, and methods
Apparatus, systems, and methods disclosed herein may initialize a delay-locked loop (DLL) or phase-locked loop (PLL) to achieve a locked condition and may then...
Three dimensional memory array architecture
Three dimensional memory array architectures and methods of forming the same are provided. An example memory array can include a stack comprising a plurality of...
Method, system and device for phase change memory with shunt
Embodiments disclosed herein may relate to forming a storage component comprising a phase change material and a shunt relative to amorphous portions of the...
Memory cells and methods of forming memory cells
Some embodiments include a memory cell that has an electrode, a switching material over the electrode, a buffer region over the switching material, and an ion...
Solid state lighting devices with accessible electrodes and methods of
Various embodiments of light emitting dies and solid state lighting ("SSL") devices with light emitting dies, assemblies, and methods of manufacturing are...
Back-to-back solid state lighting devices and associated methods
Solid state lights (SSLs) including a back-to-back solid state emitters (SSEs) and associated methods are disclosed herein. In various embodiments, an SSL can...
Semiconductor device including filling material provided in space defined
by three semiconductor chips
A semiconductor device comprises a wiring substrate, first and second semiconductor chips mounted on the wiring substrate so as to be spaced apart from each...
Methods for forming interconnections between top electrodes in memory
cells by a two-step chemical-mechanical...
Memory cell array architectures and methods of forming the same are provided. An example method for forming an array of memory cells can include forming a...
Methods of forming a substrate opening
A method of forming a substrate opening includes forming a plurality of side-by-side openings in a substrate. At least some of immediately adjacent side-by-side...
Stacked semiconductor die assemblies with high efficiency thermal paths
and associated methods
A semiconductor die assembly having high efficiency thermal paths. In one embodiment, the semiconductor die assembly comprises a package support substrate, a...
Methods and apparatuses for memory testing with data compression
Apparatuses and methods for memory testing with data compression is described. An example apparatus includes a plurality of latch test circuits, wherein each of...
Leakage current detection
A system includes a first switch, an amplifier, a second switch, and a capacitor. The first switch is electrically coupled between a first reference voltage and...
Semiconductor device including main amplifers between memory cell arrays
A semiconductor device includes a plurality of main amplifiers provided between memory cell arrays. One of the main amplifiers is disposed closer to one of the...
Connections for memory electrode lines
Subject matter disclosed herein may relate to word line electrodes and/or digit line electrodes in a cross-point array memory device. One or more word line...
Methods and systems for data analysis in a state machine
A state machine engine may be configured to recognize (e.g., detect) a great number of patterns in a data stream. This may be accomplished via detection cells...
Interrupted write memory operation in a serial interface memory with a
portion of a memory address
Subject matter disclosed herein relates to read and write processes of a memory device.
Self-adaptive solid state drive controller
A memory device may comprise circuitry to determine a number of channels through which to transfer information to adjust between latency and throughput in...
Memory controller supporting rate-compatible punctured codes
Apparatus and methods store data in a non-volatile solid state memory device according to a rate-compatible code, such as a rate-compatible convolutional code...
Apparatuses and methods including selectively providing a single or
separate chip select signals
Apparatus and methods are disclosed herein, including those that operate to initialize registers of a first memory device and a second memory device of a...
Probe assembly and probe base plate
A probe assembly includes a wiring base plate arranged on a lower surface side of a reinforcing plate and a probe base plate arranged on a lower surface side of...
Plunger housing body
Plunger housing body
An electronic component may include an integrated circuit device package and a second substrate. The integrated circuit device package may include a first...
Phase change memory structures and methods
A method of forming a phase change material memory cell includes forming a number of memory structure regions, wherein the memory structure regions include a...
Memory cell having nonmagnetic filament contact and methods of operating
and fabricating the same
A magnetic cell structure including a nonmagnetic filament contact, and methods of fabricating the structure are provided. The magnetic cell structure includes...
Elevated pocket pixels, imaging devices and systems including the same and
method of forming the same
An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including,...
Vertical memory cell string with dielectric in a portion of the body
Some embodiments include a memory cell string having a body having a channel extending therein and in contact with a source/drain, a select gate adjacent to the...
Methods and apparatuses having strings of memory cells including a metal
Methods for forming a string of memory cells, an apparatus having a string of memory cells, and a system are disclosed. A method for forming the string of...
Methods of forming semiconductor structures including tight pitch contacts
Methods of fabricating semiconductor structures incorporating tight pitch contacts aligned with active area features and of simultaneously fabricating...
Methods for polishing phase change materials
A slurry for polishing a phase change material, such as Ge--Sb--Te, or germanium-antimony-tellurium (GST), includes abrasive particles of sizes that minimize at...
Continuous adjusting of sensing voltages
The present disclosure includes apparatuses and methods for continuous adjusting of sensing voltages. A number of embodiments include continuously monitoring an...
Memory devices and programming memory arrays thereof
An embodiment of a method includes decreasing a difference of a voltage applied to a first select gate minus a voltage applied to a source while the first...
Resistance variable memory sensing
The present disclosure includes apparatuses and methods for sensing a resistance variable memory cell. A number of embodiments include programming a memory cell...
Dual mode clock and data scheme for memory programming
A Phase-Change Memory (PCM) includes a factory programming interface to receive data changing on both a positive transition and a negative transition of a dual...