Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: micron





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-7,847,366 Well for CMOS imager
A well region of a first conductivity type located in a substrate of the first conductivity type and below about half the channel length of an electrically...
US-7,847,344 Memory utilizing oxide-nitride nanolaminates
Structures, systems and methods for transistors utilizing oxide-nitride nanolaminates are provided. One transistor embodiment includes a first source/drain...
US-7,847,282 Vertical tunneling transistor
The disclosed embodiments relate to a vertical tunneling transistor that may include a channel disposed on a substrate. A quantum dot may be disposed so that an...
US-7,846,851 Method and apparatus for a two-step resist soft bake to prevent ILD outgassing during semiconductor processing
A semiconductor wafer having no photoresist craters at the completion of a two-step post-apply resist bake (soft bake) in the fabrication of an integrated...
US-7,846,812 Methods of forming trench isolation and methods of forming floating gate transistors
A method of forming trench isolation includes etching first trench lines into semiconductive material of a semiconductor substrate. First isolation material is...
US-7,846,798 Methods of forming vertical transistor structures
The invention includes methods in which an angled implant is utilized to self-align a source/drain region implant with the top edge of a gateline of a vertical...
US-7,846,776 Methods for releasably attaching sacrificial support members to microfeature workpieces and microfeature...
Methods for releasably attaching sacrificial support members to microfeature workpieces and microfeature devices formed using such methods are disclosed herein....
US-7,846,768 Stacked die package for peripheral and center device pad layout device
An assembly method is disclosed that includes providing a substrate, securing a first semiconductor device on a first surface thereof, and superimposing at least...
US-7,846,623 Resist pattern and reflow technology
A reflow stabilizing solution for treating photoresist patterns and a reflow technology are disclosed. The reflow stabilizing solution comprises a polymer and is...
US-7,846,288 Methods and systems for removing protective films from microfeature workpieces
Methods and systems for removing protective films from microfeature workpieces are disclosed herein. One particular embodiment of such a method comprises...
US-7,845,540 Systems and methods for depositing conductive material into openings in microfeature workpieces
Systems and methods for depositing conductive material into openings in microfeature workpieces are disclosed herein. One particular embodiment of a system for...
US-7,844,811 Using chip select to specify boot memory
A synchronous Flash memory device is described that enhances initialization and boot memory device identification in synchronous memory systems. A boot memory is...
US-7,844,142 Communication methods, methods of forming an interconnect, signal interconnects, integrated circuit structures,...
Some embodiments include communication methods, methods of forming an interconnect, signal interconnects, integrated circuit structures, circuits, and data...
US-7,844,137 Multisampling with reduced bit samples
A relatively non-complex signal processor supporting an active pixel sensor imaging system is disclosed. The signal processor only requires the first sample from...
US-7,843,735 Sensing memory cells
Methods, devices, modules, and systems for operating memory cells are taught. A method for operating memory cells includes programming at least one of the memory...
US-7,843,726 Sensing against a reference cell
Memory devices, bulk storage devices, and methods of operating memory are disclosed, such as those adapted to process and generate analog data signals...
US-7,843,725 M+L bit read column architecture for M bit memory cells
A memory device and programming and/or reading process is described that programs a row of non-volatile multi-level memory cells (MLC) in a single program...
US-7,843,204 Electrical connecting apparatus
The object of the present invention is to prevent an operator from touching electronic elements arranged on an upper surface of a probe assembly of an electrical...
US-7,843,198 Electrical connecting apparatus
An electrical connecting apparatus for use in an electrical inspection of a tester and a device under test. The electrical connecting apparatus is provided with...
US-7,843,050 Microelectronic die packages with metal leads, including metal leads for stacked die packages, and associated...
Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked...
US-7,842,926 Method and device for correcting SLM stamp image imperfections
The invention relates to production and precision patterning of work pieces, including manufacture of photomask for photolithography and direct writing on other...
US-7,842,915 Microelectronic imagers with integrated optical devices and methods for manufacturing such microelectronic imagers
Microelectronic imagers with integrated optical devices and methods for manufacturing imagers. The imagers, for example, typically have an imaging unit including...
US-7,842,558 Masking process for simultaneously patterning separate regions
According to another embodiment of the present invention, a method comprises patterning a first plurality of semiconductor structures in an array portion of a...
US-7,842,525 Method and apparatus for personalization of semiconductor
A system for making small modifications to the pattern in standard processed semiconductor devices. The modifications are made to create a small variable part of...
US-7,842,523 Buried conductor for imagers
A pixel cell having a photo-conversion device at a surface of a substrate and at least one contact area from which charge or a signal is output or received. A...
US-7,840,952 Method and system for generating object code to facilitate predictive memory retrieval
A method and system are described for generating reference tables in object code which specify the addresses of branches, routines called, and data references...
US-7,839,703 Subtraction circuits and digital-to-analog converters for semiconductor devices
A memory device that, in certain embodiments, includes a plurality of memory elements connected to a bit-line and a delta-sigma modulator with a digital output...
US-7,839,179 Balanced phase detector
Methods and apparatus are disclosed, such as those involving a digital phase detector that includes a phase detection circuit configured to detect which one of...
US-7,838,920 Trench memory structures and operation
Memory cells utilizing dielectric charge carrier trapping sites formed in trenches provide for non-volatile storage of data. The memory cells of the various...
US-7,838,381 Stud capacitor device and fabrication method
The present teachings relate to a method of forming a container capacitor structure on a substrate. In one embodiment, the method comprises etching a recess in...
US-7,838,362 Method of making an embedded trap direct tunnel non-volatile memory
The cell comprises a substrate having a drain region and a source region. An oxynitride layer is formed over the substrate. An embedded trap layer is formed over...
US-7,838,360 Memory array with surrounding gate access transistors and capacitors with global and staggered local bit lines
A memory array with staggered local data/bit lines extending generally in a first direction formed in an upper surface of a substrate and memory cell access...
US-7,838,183 Multi-layer, attenuated phase-shifting mask
The present invention provides an attenuated phase shift mask ("APSM") that, in each embodiment, includes completely transmissive regions sized and shaped to...
US-7,838,178 Masks for microlithography and methods of making and using such masks
Masks for microlithography apparatus, methods for making such masks, and methods for exposing photosensitive materials to form arrays of microfeatures on...
US-7,838,084 Atomic layer deposition method of depositing an oxide on a substrate
The invention includes atomic layer deposition methods of depositing an oxide on a substrate. In one implementation, a substrate is positioned within a...
US-7,837,889 Methods of etching nanodots, methods of removing nanodots from substrates, methods of fabricating integrated...
Embodiments of the invention include methods of etching nanodots, to methods of removing nanodots from substrates, and to methods of fabricating integrated...
US-7,837,805 Methods for treating surfaces
Some embodiments include methods of treating surfaces with aerosol particles. The aerosol particles may be formed as liquid particles, and then passed through a...
US-7,837,797 Systems and methods for forming niobium and/or vanadium containing layers using atomic layer deposition
A method of forming (and an apparatus for forming) a metal containing layer on a substrate, particularly a semiconductor substrate or substrate assembly for use...
US-7,836,374 Memory controller method and system compensating for memory cell data losses
A computer system includes a memory controller coupled to a memory module containing several DRAMs. The memory module also includes a non-volatile memory storing...
US-7,836,363 DVI link with circuit and method for test
A method of transmitting data through a link comprises encoding digital data into encoded digital data in a transition minimized differential signaling encoder,...
US-7,836,362 Circuits and methods for repairing defects in memory devices
Some embodiments of the invention include a memory device has a number of memory segments connected to a supply source through a supply control circuit. The...
US-7,836,252 System and method for optimizing interconnections of memory devices in a multichip module
An apparatus and method couples memory devices in a memory module to a memory hub on the module such that signals traveling from the hub to the devices have the...
US-7,835,533 Method for manufacturing condenser microphone
A circuit board forming member, a case forming member, a spacer forming member, a diaphragm sheet and a diaphragm plate forming member are laminated to form a...
US-7,835,532 Microphone array
By integrating plural condenser microphone constituting bodies in an array state, a condenser microphone array is obtained.The condenser microphone array is...
US-7,835,207 Stacked device remapping and repair
Various embodiments include apparatus, systems, and methods having multiple dice arranged in a stack in which a defective cell may be replaced by a spare cell on...
US-7,835,205 Delay stage-interweaved analog DLL/PLL
A methodology is disclosed that enables the delay stages of an analog delay locked loop (DLL) or phase locked loop (PLL) to be programmed according to the...
US-7,835,194 Erase operation in a flash memory device
A method for erasing a non-volatile memory device performs a block erase operation. The cells are then soft programmed and erase verified to determine if the...
US-7,835,190 Methods of erase verification for a flash memory device
Methods and apparatus are disclosed, such as those involving a flash memory device that includes a memory block. The memory block includes a plurality of data...
US-7,835,173 Resistive memory
The present disclosure includes resistive memory devices and systems having resistive memory cells, as well as methods for operating the resistive memory cells....
US-7,835,158 Connection verification technique
Embodiments of the present invention are generally directed to testing connections of a memory device to a circuit board or other device. In one embodiment, a...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.