At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.
Method, apparatus and system using hierarchical histogram for automatic
exposure adjustment of an image
A method, apparatus and system with a hierarchical histogram generator that generates sub-histograms of differing resolutions. These sub-histograms are used to...
Probe unit substrate
A ceramic substrate has, on its surface, a multilayer wiring division, on which micro cantilever type probes are fixed. The multilayer wiring division has the...
Surface depressions for die-to-die interconnects and associated systems
Stacked microelectronic dies employing die-to-die interconnects and associated systems and methods are disclosed herein. In one embodiment, a stacked system of...
The invention includes methods of forming electrically conductive material between line constructions associated with a peripheral region or a pitch region of a...
Phase change memory elements using energy conversion layers, memory arrays
and systems including same, and...
A phase change memory element and method of forming the same. The memory element includes a phase change material layer electrically coupled to first and second...
Method and apparatus for setting black level in an imager using both
optically black and tied pixels
An imaging pixel array includes an active area of pixels, organized into rows and columns of pixels. The array also includes a plurality of dark pixel columns...
Probe sheet and electrical connecting apparatus
An embodiment of a probe sheet enabling to restrict misalignment of the posture of each contactor accurately positioned on a probe sheet main body caused by...
Methods of forming semiconductor constructions
The invention includes methods of forming isolation regions for semiconductor constructions. A hard mask can be formed and patterned over a semiconductor...
Method of fabricating a stacked die having a recess in a die BGA package
Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies are provided.
Methods and apparatus for sorting and/or depositing nanotubes
Methods and apparatus for forming devices using nanotubes. In one embodiment, an apparatus for depositing nanotubes onto a workpiece comprises a vessel...
Silver selenide sputtered films and method and apparatus for controlling
defect formation in silver selenide...
Method and apparatus for sputter depositing silver selenide and controlling defect formation in and on a sputter deposited silver selenide film are provided. A...
Error detection, documentation, and correction in a flash memory device
A memory device has an error documentation memory array that is separate from the primary memory array. The error documentation memory array stores data relating...
Memory module, system and method of making same
A memory module, system and method of making the same includes a memory module including a plurality of memory devices having a first portion of memory devices...
Switched capacitor for a tunable delay circuit
A method and apparatus is provided for providing a fine delay by switching on a capacitor delay. A coarse delay and/or a fine delay are implemented upon a...
Output buffer and method having a supply voltage insensitive slew rate
An output buffer includes a final driver formed by first and second MOSFET transistors that alternately couple an output terminal to respective supply voltages....
Methods of redistributing bondpad locations on an integrated circuit
Integrated circuits and methods of redistributing bondpad locations are disclosed. In one implementation, a method of redistributing a bondpad location of an...
The invention includes semiconductor packages having grooves within a semiconductor die backside; and includes semiconductor packages utilizing carbon...
Finned memory cells
For an embodiment, a memory array has a plurality fins protruding from a substrate. A tunnel dielectric layer overlies the fins. A plurality floating gates...
Methods of making self-aligned nano-structures
A method for creating structures in a semiconductor assembly is provided. The method includes etching apertures into a dielectric layer and applying a polymer...
Masking techniques and contact imprint reticles for dense semiconductor
A reticle comprising isolated pillars is configured for use in imprint lithography. In some embodiments, on a first substrate a pattern of pillars...
Conductive interconnect structures and formation methods using
Conductive interconnect structures and formation methods using supercritical fluids are disclosed. A method in accordance with one embodiment of the invention...
Recessed gate dielectric antifuse
A recessed dielectric antifuse device includes a substrate and laterally spaced source and drain regions formed in the substrate. A recess is formed between the...
Front-end processing of nickel plated bond pads
A front-end method of fabricating nickel plated caps over copper bond pads used in a memory device. The method provides protection of the bond pads from an...
Methods of depositing materials over substrates, and methods of forming
layers over substrates
The invention includes methods of utilizing supercritical fluids to introduce precursors into reaction chambers. In some aspects, a supercritical fluid is...
Active memory command engine and method
A command engine for an active memory receives high level tasks from a host and generates corresponding sets of either DCU commands to a DRAM control unit or ACU...
Memory device architectures and operation
Non-volatile memory devices logically organized to have erase blocks of at least two different sizes provide for concurrent erasure of multiple physical blocks...
Non-volatile SRAM cell
Methods, devices and systems for non-volatile static random access memory (SRAM) are provided. One method embodiment for operating an SRAM includes transferring...
Fully associative texture cache having content addressable memory and
method for use thereof
A graphics processing system including a cache memory circuit coupled to the graphics processor and the address and data busses for storing graphics data...
Duty cycle error calculation circuit for a clock generator having a delay
locked loop and duty cycle correction...
A system and method for generating a correction signal for correcting duty cycle error of a first clock signal relative to a second complementary clock signal....
Electronic device probe card with improved probe grouping
The probe card includes a plurality of probes arranged on one surface side of a board. These probes belonging to any one of a first probe group including a...
Pass through via technology for use during the manufacture of a
Via structures are described which pass through a semiconductor substrate assembly such as a semiconductor die or wafer and allows for two different types of...
Interposers for semiconductor die packages with standard ball grill array
Apparatus and methods for forming semiconductor assemblies. An interposer includes a perimeter wall surrounding at least a portion of an upper surface thereof to...
Interconnects for packaged semiconductor devices and methods for
manufacturing such devices
Packaged semiconductor devices and assemblies including interconnects and methods for forming such interconnects are disclosed herein. One embodiment of a...
Image sensor packages and frame structure thereof
A semiconductor package such as an image sensor package. A frame structure includes an array of frames, each having an aperture therethrough, into which an image...
In some embodiments, an opening is formed through a first material, and sidewall topography of the opening is utilized to form a pair of separate anisotropically...
CMOS imager having a nitride dielectric
An imaging device formed as a CMOS semiconductor integrated circuit includes a nitrogen containing insulating material beneath a photogate. The nitrogen...
Profiling solid state samples
Methods and apparatus may operate to position a sample, including an imager lens surface, within a processing chamber. Further activities may include creating a...
Enhanced memory density resistance variable memory cells, arrays, devices
and systems including the same, and...
A resistance variable memory cell and method of forming the same. The memory cell includes a first electrode and at least one layer of resistance variable...
Electron induced chemical etching/deposition for enhanced detection of
A method of imaging and identifying defects and contamination on the surface of an integrated circuit is described. The method may be used on areas smaller than...
Methods of forming a phosphorus doped silicon dioxide-comprising layer
This invention includes methods of forming a phosphorus doped silicon dioxide comprising layers, and methods of forming trench isolation in the fabrication of...
Integrated circuit insulators and related methods
A system and method for providing low dielectric constant insulators in integrated circuits is provided. One aspect of this disclosure relates to a method for...
Method of fabricating different gate oxides for different transistors in
an integrated circuit
An integrated circuit and gate oxide forming process are disclosed which provide a gate structure that is simple to integrate with conventional fabrication...
Methods for isolating portions of a loop of pitch-multiplied material and
Different portions of a continuous loop of semiconductor material are electrically isolated from one another. In some embodiments, the end of the loop is...
Methods of forming memory arrays and semiconductor constructions
Some embodiments include DRAM having transistor gates extending partially over SOI, and methods of forming such DRAM. Unit cells of the DRAM may be within active...
Methods of forming multiple lines
Some embodiments include formation of polymer spacers along sacrificial material, removal of the sacrificial material, and utilization of the polymer spacers as...
Optical compensation devices, systems, and methods
Photolithographic apparatus, systems, and methods that make use of optical compensation devices are disclosed. In various embodiments, an imaging mask includes...
System and method for recirculating fluid supply for an injector for a
semiconductor fabrication chamber
One embodiment of the present subject matter includes a system which includes a tank, a conduit is adapted to carry a recirculating supply of fluid from the tank...
Apparatus and method for data bypass for a bi-directional data bus in a
hub-based memory sub-system
A memory hub includes first and second link interfaces for coupling to respective data busses, a data path coupled to the first and second link interfaces and...
Circuits, devices, systems, and methods of operation for capturing data
Embodiments of the invention are described for driving data onto a data bus. The embodiments include a data driver circuit having a data capture circuit coupled...
Memory cell shift estimation method and apparatus
Memory devices and methods are disclosed, such as those facilitating interpolation methods for reference memory cells based on their reference state and/or...