Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: micron





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-7,749,882 Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
Microelectronic devices and method of forming a plurality of microelectronic devices on a semiconductor workpiece are disclosed herein. One such method includes...
US-7,749,879 ALD of silicon films on germanium
The use of atomic layer deposition (ALD) to form a semiconductor structure of a silicon film on a germanium substrate is disclosed. An embodiment includes a...
US-7,749,860 Method for forming a self-aligned T-shaped isolation trench
The present invention relates to a method for forming an isolation trench structure in a semiconductor substrate without causing deleterious topographical...
US-7,749,849 Methods of selectively oxidizing semiconductor structures, and structures resulting therefrom
Methods for selectively oxidizing a semiconductor structure include generating a gas cluster ion beam comprising an oxidizing source gas, directing the gas...
US-7,749,848 Band-engineered multi-gated non-volatile memory device with enhanced attributes
Non-volatile memory devices and arrays are described that facilitate the use of band-gap engineered gate stacks with asymmetric tunnel barriers in floating gate...
US-7,749,837 High coupling memory cell
A first dielectric layer is formed over a substrate. A single layer first conductive layer that acts as a floating gate is formed over the first dielectric...
US-7,749,808 Stacked microelectronic devices and methods for manufacturing microelectronic devices
Stacked microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. An embodiment of one such microelectronic device can...
US-7,749,786 Methods of forming imager systems
Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for...
US-7,749,663 Method for adjusting dimensions of photomask features
A method for adjusting one or more dimensions of a photomask subsequent to etching of a defective pattern in the chrome-containing layer thereof is provided. The...
US-7,749,349 Methods and systems for releasably attaching support members to microfeature workpieces
Methods and apparatuses for releasably attaching support members to microfeature workpieces to support members are disclosed herein. In one embodiment, for...
US-7,749,327 Methods for treating surfaces
Some embodiments include methods for treating surfaces. Beads and/or other insolubles may be dispersed within a liquid carrier to form a dispersion. A transfer...
US-7,747,933 Method and apparatus for detecting communication errors on a bus
A semiconductor memory includes multi-mode reporting signals, a state register, and parity detectors. The parity detector determines whether signals received on...
US-7,747,903 Error correction for memory
Methods and devices operate to apply and provide differing levels of error correction within a multi-level, non-volatile memory. In an example, the differing...
US-7,747,890 Method and apparatus of high-speed input sampling
A signal sampler and method for high-speed input sampling of a signal are disclosed. A first sampler samples a data signal at a rising edge of a clock signal and...
US-7,747,090 Scan line to block re-ordering buffer for image compression
A re-order buffer memory in a real-time application such as e.g., an imager. Initially, input data is written into the re-order buffer using a first addressing...
US-7,746,959 Method and system for generating reference voltages for signal receivers
A method and system for generating a reference voltage for memory device signal receivers operates in either a calibration mode or a normal operating mode. In...
US-7,746,720 Techniques for reducing leakage current in memory devices
Techniques for reducing gate induced drain leakage (GIDL) in memory devices utilizing negative wordline architectures. More specifically, a method and apparatus...
US-7,746,710 Data bus power-reduced semiconductor storage apparatus
In one or more of the disclosed embodiments, the number of times toggle operations of a data bus are performed at the time of a data transmission in a...
US-7,746,701 Semiconductor memory device having bit line pre-charge unit separated from data register
A semiconductor memory device is described that can, in certain embodiments, reduce a delay in access time and/or an area of a memory cell array. In one or more...
US-7,746,700 NAND architecture memory devices and operation
Non-volatile memory devices utilizing a modified NAND architecture where both ends of the NAND string of memory cells are selectively coupled to the same bit...
US-7,746,691 Methods and apparatus utilizing predicted coupling effect in the programming of non-volatile memory
Methods and memory devices configured to utilize predicted coupling effects of neighboring memory cells in the programming of target memory cells can be utilized...
US-7,746,398 Wide dynamic range active pixel with knee response
A pixel circuit, and a method for operating a pixel circuit, to provide a multiple knee response characteristic. In one embodiment a pixel circuit comprises a...
US-7,746,170 Class AB amplifier and imagers and systems using same
A class AB amplifier includes an input stage having a pair of differential input terminals, first and second differential output terminals, and a local common...
US-7,745,944 Microelectronic devices having intermediate contacts for connection to interposer substrates, and associated...
Microelectronic devices having intermediate contacts, and associated methods of packaging microelectronic devices with intermediate contacts, are disclosed...
US-7,745,942 Die package and probe card structures and fabrication methods
A semiconductor die has conductors encapsulated in a dielectric material disposed on the active surface extending across the active surface from bond pads to one...
US-7,745,934 Integrated circuit and seed layers
Structures are provided that include a conducting layer disposed on a layered arrangement of a diffusion barrier layer and a seed layer in an integrated circuit....
US-7,745,920 Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a packaged...
US-7,745,900 Method and apparatus providing refractive index structure for a device capturing or displaying images
A transient index stack having an intermediate transient index layer, for use in an imaging device or a display device, that reduces reflection between layers...
US-7,745,873 Ultra-thin body vertical tunneling transistor
A vertical tunneling, ultra-thin body transistor is formed on a substrate out of a vertical oxide pillar having active regions of opposing conductivity on...
US-7,745,808 Differential negative resistance memory
The invention relates to a DNR (differential negative resistance) exhibiting device that can be programmed to store information as readable current amplitudes...
US-7,745,319 System and method for fabricating a fin field effect transistor
There is provided a system and method for fabricating a fin field effect transistor. More specifically, in one embodiment, there is provided a method comprising...
US-7,745,295 Methods of forming memory cells
Some embodiments include methods of forming memory cells. Dopant is implanted into a semiconductor substrate to form a pair of source/drain regions that are...
US-7,745,283 Method of fabricating memory transistor
A method of forming a memory transistor includes providing a substrate comprising semiconductive material and forming spaced-apart source/drain structures. At...
US-7,745,231 Resistive memory cell fabrication methods and devices
A phase change memory cell and methods of fabricating the same are presented. The memory cell includes a variable resistance region and a top and bottom...
US-7,743,303 Defective memory block remapping method and system, and memory device and processor-based system using same
A non-volatile memory device includes a block remapping system that offsets an input block address by the addresses of non-functional blocks to provide an output...
US-7,742,344 Method and apparatus for improving storage performance using a background erase
Disclosed are an apparatus, method, and computer readable medium configured for performing a background erase in a memory device. Included is the act of...
US-7,742,338 Local self-boost inhibit scheme with shielded word line
A NAND architecture non-volatile memory device and programming process is described that reduces the effects of word line to word line voltage coupling by...
US-7,742,335 Non-volatile multilevel memory cells
The present disclosure includes methods, devices, modules, and systems for operating non-volatile multilevel memory cells. One method embodiment includes...
US-7,742,324 Systems and devices including local data lines and methods of using, making, and operating the same
Disclosed are methods, systems and devices, including a device having a fin field-effect transistor with a first terminal, a second terminal, and two gates. In...
US-7,742,313 Stacked microfeature devices
Stacked microfeature devices and associated methods of manufacture are disclosed. A package in accordance with one embodiment includes first and second...
US-7,741,873 Receiver circuitry for receiving reduced swing signals from a channel
A receiver for receiving a reduced swing signal from a transmission channel is disclosed, in which the swing of the reduced swing signal is less than the power...
US-7,741,660 Pixel and imager device having high-k dielectrics in isolation structures
An imager device that has an isolation structure such that pinned photodiode characteristics are maintained without increasing doping levels. The invention...
US-7,741,589 Method and apparatus providing multiple transfer gate control lines per pixel for automatic exposure control
An imager device includes a pixel array having some pixels providing output signals for automatic light control with other pixels providing image output signals....
US-7,741,175 Methods of forming capacitors
A method of forming a capacitor includes forming a first capacitor electrode over a semiconductor substrate. A capacitor dielectric region is formed onto the...
US-7,741,150 Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
Packaged microelectronic devices and methods of manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing...
US-7,739,576 Variable strength ECC
Memory devices, circuitry, and data methods are described that facilitate the detection and correction of data in memory controllers, memory systems, and/or...
US-7,738,988 Process and method for continuous, non lot-based integrated circuit manufacturing
A method for continuous, non lot-based manufacturing of integrated circuit (IC) devices of the type to each have a unique fuse identification (ID) includes:...
US-7,738,310 Fuse data acquisition
One or more embodiments of the present disclosure provide methods, devices, and systems for operating memory devices having fuse circuits. One method embodiment...
US-7,738,295 Programming a non-volatile memory device
A non-volatile memory device that has a cache register coupled between each pair of bit lines and, in one embodiment, a data cache coupled between each pair of...
US-7,738,294 Programming multilevel cell memory arrays
Methods and apparatus, such as those for programming of multilevel cell NAND memory arrays to facilitate a reduction of program disturb, are disclosed. In one...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.