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Patent # Description
US-7,760,582 Apparatus for memory device wordline
A method and apparatus for improving the speed of a wordline in a memory device. A wordline structure includes a main wordline for selectively distributing a...
US-7,760,533 Systems, methods and devices for arbitrating die stack position in a multi-bit stack device
Embodiments are described for arbitrating stacked dies in multi-die semiconductor packages. In one embodiment, die identification data for at least two stacked...
US-7,760,532 Multi-bank memory
A multi-bank memory device includes rows and columns of memory cores. Each row includes memory cores from one bank interleaved with memory cores from another...
US-7,760,329 Optimized optical lithography illumination source for use during the manufacture of a semiconductor device
A method and structure for optimizing an optical lithography illumination source may include a shaped diffractive optical element (DOE) interposed between the...
US-7,760,019 Adaptive operational transconductance amplifier load compensation
A buffer varies the size of its output stage in response to a varying capacitive load. The capacitive load may vary in a predictable or a random manner. The...
US-7,759,800 Microelectronics devices, having vias, and packaged microelectronic devices having vias
Microelectronic devices, methods for packaging microelectronic devices, and methods for forming vias and conductive interconnects in microfeature workpieces and...
US-7,759,785 Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing...
Packaged semiconductor components, apparatus for packaging semiconductor devices, methods of packaging semiconductor devices, and methods of manufacturing...
US-7,759,747 Tantalum aluminum oxynitride high-.kappa. dielectric
Electronic apparatus and methods of forming the electronic apparatus may include a tantalum aluminum oxynitride film for use in a variety of electronic systems...
US-7,759,724 Memory cells having gate structure with multiple gates and multiple materials between the gates
Structures and methods are provided for SRAM cells having a novel, non-volatile floating gate transistor, e.g. a non-volatile memory component, within the cell...
US-7,759,717 Capacitors comprising dielectric regions having first and second oxide material portions of the same chemical...
A capacitor includes a first capacitor electrode which includes conductive metal. A second capacitor electrode is spaced from the first capacitor electrode. A...
US-7,759,715 Memory cell comprising dynamic random access memory (DRAM) nanoparticles and nonvolatile memory (NVM) nanoparticle
Some embodiments include memory cells that contain a dynamic random access memory (DRAM) element and a nonvolatile memory (NVM) element. The DRAM element...
US-7,759,665 PCRAM device with switching glass layer
A memory device, such as a PCRAM, including a chalcogenide glass backbone material with germanium telluride glass and methods of forming such a memory device.
US-7,759,660 Electron beam lithography system
Methods to reduce the write time for forming mask patterns having angled and non-angled features using electron beam lithography are disclosed. In one exemplary...
US-7,759,620 Fourier plane analysis and refinement of SLM calibration
The present disclosure relates to phase-sensitive calibration of an SLM system. In particular, it relates to selecting among local calibrations when there is...
US-7,759,240 Use of palladium in IC manufacturing with conductive polymer bump
An apparatus and a method for forming a substrate having a palladium metal layer over at least one contact point of the substrate and having a flexible...
US-7,759,237 Method of forming lutetium and lanthanum dielectric structures
Methods of forming dielectric structures are shown. Methods of forming dielectric structures are shown that include lutetium oxide and lanthanum aluminum oxide...
US-7,759,233 Methods for stressing semiconductor material structures to improve electron and/or hole mobility of transistor...
Semiconductor material strips are secured to substrates in such a way as to stress the semiconductor material. The strips of semiconductor material may be...
US-7,759,221 Methods for packaging microelectronic devices and microelectronic devices formed using such methods
Methods for packaging microelectronic devices and microelectronic devices formed using such methods are disclosed herein. One aspect of the invention is directed...
US-7,759,197 Method of forming isolated features using pitch multiplication
Crisscrossing spacers formed by pitch multiplication are used as a mask to form isolated features, such as contacts vias. A first plurality of mandrels are...
US-7,759,193 Methods of forming a plurality of capacitors
A method of forming a plurality of capacitors includes forming a plurality of individual capacitor electrodes using two masking steps. An earlier of the two...
US-7,759,187 Metal plating using seed film
A seed film and methods incorporating the seed film in semiconductor applications is provided. The seed film includes one or more noble metal layers, where each...
US-7,759,183 Dual work function metal gates and methods of forming
Complementary transistors and methods of forming the complementary transistors on a semiconductor assembly are described. The transistors can be formed from a...
US-7,759,154 Ultrashallow photodiode using indium
The invention provides an imager having a p-n-p photodiode with an ultrashallow junction depth. A p+ junction layer of the photodiode is doped with indium to...
US-7,759,053 Methods of fabricating integrated circuitry
The invention includes methods of fabricating integrated circuitry and semiconductor processing polymer residue removing solutions. In one implementation, a...
US-7,757,385 System for fabricating semiconductor components with through wire interconnects
A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back...
US-7,757,061 System and method for decoding commands based on command signals and operating state
A system and method for decoding command signals that includes a command decoder configured to generate internal control signals to perform an operation based on...
US-7,755,940 Method, apparatus, and system for erasing memory
Methods, apparatus, and systems may operate such as to perform a pre-programming operation on a plurality of multiple level memory cells of a memory device. One...
US-7,755,939 System and devices including memory resistant to program disturb and methods of using, making, and operating...
Disclosed are methods, systems and devices, one such device being a memory device configured to concurrently assert a first pulse pattern through a plurality of...
US-7,755,684 Row driver circuitry for imaging devices and related method of operation
Row drivers as a part of an image sensor device include circuitry for supplying a plurality of signals with an increased voltage and enhanced reliability to a...
US-7,755,657 Method for high precision printing of patterns
The present invention includes a method to print patterns with improved edge acuity. The method for printing fine patterns comprises the actions of: providing an...
US-7,755,570 Microdisplay and interface on a single chip
A microdisplay having interface circuitry on the same silicon backplane to allow it to receive digital images and video in a variety of formats and convert same...
US-7,755,404 Delay locked loop circuit and method
Delay locked loop circuits and methods are disclosed. In the embodiments, a delay locked loop may include a phase detector to detect a phase difference between a...
US-7,755,385 Method for operating an electronic device with reduced pin capacitance
A method of operating an electronic device having an output driver with on die termination legs ODT, and non-ODT legs, includes the step of selectively...
US-7,755,316 Moving member movement control apparatus, moving member movement control method and machine tool movement...
A movement control apparatus for a moving member, includes: a drive unit that moves a moving member by rapid traverse on a first axis and a second axis...
US-7,755,204 Stacked die module including multiple adhesives that cure at different temperatures
A technique for forming die stacks. Specifically, a stacking tip is provided to facilitate the stacking of die in a desired configuration. A first die is picked...
US-7,755,183 Wiring board, method of manufacturing the same, and semiconductor device
According to this invention, a wiring board includes a conductive pattern formed from leads each of which is formed on an organic layer and has a thickness t...
US-7,755,119 Method and apparatus for reducing imager floating diffusion leakage
An imager having reduced floating diffusion leakage and a mechanism for improving the storing of collected charge is described. A polysilicon contact is provided...
US-7,754,618 Method of forming an apparatus having a dielectric containing cerium oxide and aluminum oxide
A dielectric layer including cerium oxide and aluminum oxide acting as a single dielectric layer, and a method of fabricating such a dielectric layer, produces a...
US-7,754,612 Methods and apparatuses for removing polysilicon from semiconductor workpieces
Methods and apparatuses for removing polysilicon material from a semiconductor workpiece are disclosed. A particular method includes contacting a polishing pad...
US-7,754,576 Method of forming inside rough and outside smooth HSG electrodes and capacitor structure
A container capacitor and method of forming the container capacitor are provided. The container capacitor comprises a lower electrode fabricated by forming a...
US-7,754,532 High density chip packages, methods of forming, and systems including same
Methods and devices for multi-chip stacks are shown. A method is shown that assembles multiple chips into stacks by stacking wafers prior to dicing into...
US-7,754,531 Method for packaging microelectronic devices
Methods for packaging microelectronic devices and microelectronic devices formed by such methods are disclosed herein. In one embodiment, a method includes...
US-7,754,522 Phase change memory structures and methods
Methods, devices, and systems associated with phase change memory structures are described herein. One or more embodiments of the present disclosure can reduce...
US-7,754,399 Methods of forming reticles
The invention includes reticle constructions and methods of forming reticle constructions. In a particular aspect, a method of forming a reticle includes...
US-7,754,395 Methods of forming and using reticles
Some embodiments include methods of treating reticles to provide backside masking across regions of the reticle to compensate for problems occurring during...
US-7,753,693 Contacts and electrical connecting apparatus using the same
An electrical connecting apparatus uses a plurality of contacts each of which includes: a principal portion having an outer face curved and directed to a...
US-RE41,441 Output buffer having inherently precise data masking
A maskable data output buffer includes an output stage receiving data signals from a data coder. The signals output from the data coder are normally...
US-7,752,381 Version based non-volatile memory translation layer
A non-volatile memory and erase block/data block/sector/cluster update and address translation scheme utilizing a version number is detailed that enhances data...
US-7,751,634 Compression system for integrated sensor devices
An imaging system incorporating adaptive compression which includes determining linear predictive differential residuals from an imager array pixel row. The...
US-7,751,263 Data retention kill function
Various data protection techniques are provided. In one embodiment, a method includes manufacturing a memory component of an electronic system. Manufacturing the...
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